inorder: make marking of dest. regs an explicit request

formerly, this was implicit when you accessed the execution unit
or the use-def unit but it's better that this just be something
that a user can specify.

diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index 9352d8e9d2f7dc1b6e3692a1404a5e0c0312522a..ce3796528370ebfe95737a694c46d16a4f4cca62 100644 (file)
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -419,6 +419,7 @@ InOrderCPU::createBackEndSked(DynInstPtr inst)
     }
 
     // EXECUTE
+    X.needs(RegManager, UseDefUnit::MarkDestRegs);
     for (int idx=0; idx < inst->numSrcRegs(); idx++) {
         if (!idx || !inst->isStore()) {
             X.needs(RegManager, UseDefUnit::ReadSrcReg, idx);

diff --git a/src/cpu/inorder/resources/execution_unit.cc b/src/cpu/inorder/resources/execution_unit.cc
index 8ea320b6bffb14e31610973753475c04f9648352..ca1f4ade4c7b00cc8ecac94e4eabc27c28dd0624 100644 (file)
--- a/src/cpu/inorder/resources/execution_unit.cc
+++ b/src/cpu/inorder/resources/execution_unit.cc
@@ -99,18 +99,6 @@ ExecutionUnit::execute(int slot_num)
         return;
     }
 
-
-    //@todo: may want to make a separate schedule entry for setting
-    //       destination register dependencies
-    //@note: typically want to set the output dependencies right
-    //       before we do any reading or writing of registers
-    //       (in RegFile Manager(use_def.cc)) but there are some
-    //       instructions that dont have src regs, so just in case
-    //       take care of reg. dep. map stuff here
-    if (!inst->isRegDepEntry()) {
-        regDepMap[tid]->insert(inst);
-    }
-
     switch (exec_req->cmd)
     {
       case ExecuteInst:

diff --git a/src/cpu/inorder/resources/use_def.cc b/src/cpu/inorder/resources/use_def.cc
index 64299802127314fc067c3b04ee3ab72aed1f0417..a66b64bfc24db13e45a780177b28cb9dae11f710 100644 (file)
--- a/src/cpu/inorder/resources/use_def.cc
+++ b/src/cpu/inorder/resources/use_def.cc
@@ -172,12 +172,6 @@ UseDefUnit::execute(int slot_idx)
         *nonSpecSeqNum[tid] = seq_num;
     }
 
-    //@todo: may want to make a separate schedule entry for setting
-    //       destination register dependencies
-    if (!inst->isRegDepEntry()) {
-        regDepMap[tid]->insert(inst);
-    }
-
     switch (ud_req->cmd)
     {
       case ReadSrcReg:
@@ -446,6 +440,13 @@ UseDefUnit::execute(int slot_idx)
         }
         break;
 
+      case MarkDestRegs:
+        {
+            regDepMap[tid]->insert(inst);
+            ud_req->done();
+        }
+        break;
+
       default:
         fatal("Unrecognized command to %s", resName);
     }

diff --git a/src/cpu/inorder/resources/use_def.hh b/src/cpu/inorder/resources/use_def.hh
index 4c3eceef8a972cfe1e4071cdda6a617089605ab9..7e2a7746996ce9c1e335609a344aa3c933607aab 100644 (file)
--- a/src/cpu/inorder/resources/use_def.hh
+++ b/src/cpu/inorder/resources/use_def.hh
@@ -50,7 +50,8 @@ class UseDefUnit : public Resource {
 
     enum Command {
         ReadSrcReg,
-        WriteDestReg
+        WriteDestReg,
+        MarkDestRegs
     };
 
   public: