re PR target/81641 (Assemble failure with named address spaces and -masm=intel)
authorUros Bizjak <ubizjak@gmail.com>
Tue, 1 Aug 2017 11:15:52 +0000 (13:15 +0200)
committerUros Bizjak <uros@gcc.gnu.org>
Tue, 1 Aug 2017 11:15:52 +0000 (13:15 +0200)
PR target/81641
* config/i386/i386.c (ix86_print_operand_address_as): For -masm=intel
print "ds:" only for immediates in generic address space.

testsuite/ChangeLog:

PR target/81641
* gcc.target/i386/pr81641.c: New test.

From-SVN: r250769

gcc/ChangeLog
gcc/config/i386/i386.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/pr81641.c [new file with mode: 0644]

index bb56487bdff36b9dae22f2a26221a776399f5f04..ca6353ad6fe8390e6cddde4b04745c814e9211f0 100644 (file)
@@ -1,3 +1,9 @@
+2017-08-01  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/81641
+       * config/i386/i386.c (ix86_print_operand_address_as): For -masm=intel
+       print "ds:" only for immediates in generic address space.
+
 2017-08-01  Uros Bizjak  <ubizjak@gmail.com>
 
        PR target/81639
index 27011c38a45f07c844669a38d32fd68dd67b025f..494a18a2cd17c8c1f881dba552f3bcd04f3f5b31 100644 (file)
@@ -19446,7 +19446,7 @@ ix86_print_operand_address_as (FILE *file, rtx addr,
       /* Displacement only requires special attention.  */
       if (CONST_INT_P (disp))
        {
-         if (ASSEMBLER_DIALECT == ASM_INTEL && parts.seg == ADDR_SPACE_GENERIC)
+         if (ASSEMBLER_DIALECT == ASM_INTEL && ADDR_SPACE_GENERIC_P (as))
            fputs ("ds:", file);
          fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (disp));
        }
index 5c21b681ae8bf619b9a7c0306df1bae7bf894a52..c9ebc51c2c49293be4fe1bcfc459fd9ff92b8e9d 100644 (file)
@@ -1,3 +1,8 @@
+2017-08-01  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/81641
+       * gcc.target/i386/pr81641.c: New test.
+
 2017-08-01  Uros Bizjak  <ubizjak@gmail.com>
 
        PR target/81639
diff --git a/gcc/testsuite/gcc.target/i386/pr81641.c b/gcc/testsuite/gcc.target/i386/pr81641.c
new file mode 100644 (file)
index 0000000..15da9ac
--- /dev/null
@@ -0,0 +1,11 @@
+/* PR target/81641 */
+/* { dg-do assemble } */
+/* { dg-options "-O -masm=intel" } */
+/* { dg-require-effective-target masm_intel } */
+
+int test(void)
+{
+  int __seg_fs *f = (int __seg_fs *)16;
+  int __seg_gs *g = (int __seg_gs *)16;
+  return *f + *g;
+}