projects
/
nmigen.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
e230383
)
back.pysim: in simulator sync processes, start by waiting for a tick.
author
whitequark
<whitequark@whitequark.org>
Fri, 14 Dec 2018 17:05:11 +0000
(17:05 +0000)
committer
whitequark
<whitequark@whitequark.org>
Fri, 14 Dec 2018 17:05:11 +0000
(17:05 +0000)
This matches Migen behavior and also makes more sense.
nmigen/back/pysim.py
patch
|
blob
|
history
diff --git
a/nmigen/back/pysim.py
b/nmigen/back/pysim.py
index d09c981793f1da385c3bbfa10539e2b4205e98c6..ba4f0bcd7d9498c8be1b9cf033de913e7c6f57bc 100644
(file)
--- a/
nmigen/back/pysim.py
+++ b/
nmigen/back/pysim.py
@@
-241,7
+241,7
@@
class Simulator:
process = self._check_process(process)
def sync_process():
try:
- result =
process.send(None)
+ result =
None
while True:
if result is None:
result = Tick(domain)