freedreno/a4xx: add indirect draw support
authorIlia Mirkin <imirkin@alum.mit.edu>
Sun, 19 Nov 2017 21:32:12 +0000 (16:32 -0500)
committerIlia Mirkin <imirkin@alum.mit.edu>
Sat, 25 Nov 2017 22:20:17 +0000 (17:20 -0500)
This is a copy of the a5xx logic. Fails a few tests, but basic
functionality is there.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@gmail.com>
docs/features.txt
src/gallium/drivers/freedreno/a4xx/fd4_draw.h
src/gallium/drivers/freedreno/freedreno_screen.c

index e4eac28a9173f94459c0b1640c36b587ad2bebf3..59f7a180700fe7965598fb2a5646487d6a0a377d 100644 (file)
@@ -110,7 +110,7 @@ GL 3.3, GLSL 3.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, soft
 GL 4.0, GLSL 4.00 --- all DONE: i965/gen7+, nvc0, r600, radeonsi
 
   GL_ARB_draw_buffers_blend                             DONE (freedreno, i965/gen6+, nv50, llvmpipe, softpipe, swr)
-  GL_ARB_draw_indirect                                  DONE (freedreno/a5xx, i965/gen7+, llvmpipe, softpipe, swr)
+  GL_ARB_draw_indirect                                  DONE (freedreno, i965/gen7+, llvmpipe, softpipe, swr)
   GL_ARB_gpu_shader5                                    DONE (i965/gen7+)
   - 'precise' qualifier                                 DONE
   - Dynamically uniform sampler array indices           DONE (softpipe)
@@ -175,7 +175,7 @@ GL 4.3, GLSL 4.30 -- all DONE: i965/gen8+, nvc0, radeonsi
   GL_ARB_framebuffer_no_attachments                     DONE (freedreno/a5xx, i965, r600, softpipe)
   GL_ARB_internalformat_query2                          DONE (all drivers)
   GL_ARB_invalidate_subdata                             DONE (all drivers)
-  GL_ARB_multi_draw_indirect                            DONE (freedreno/a5xx, i965, r600, llvmpipe, softpipe, swr)
+  GL_ARB_multi_draw_indirect                            DONE (freedreno, i965, r600, llvmpipe, softpipe, swr)
   GL_ARB_program_interface_query                        DONE (all drivers)
   GL_ARB_robust_buffer_access_behavior                  DONE (i965)
   GL_ARB_shader_image_size                              DONE (freedreno/a5xx, i965, r600, softpipe)
@@ -242,7 +242,7 @@ GLES3.1, GLSL ES 3.1 -- all DONE: i965/hsw+, nvc0, radeonsi
 
   GL_ARB_arrays_of_arrays                               DONE (all drivers that support GLSL 1.30)
   GL_ARB_compute_shader                                 DONE (freedreno/a5xx, i965/gen7+, softpipe)
-  GL_ARB_draw_indirect                                  DONE (freedreno/a5xx, i965/gen7+, r600, llvmpipe, softpipe, swr)
+  GL_ARB_draw_indirect                                  DONE (freedreno, i965/gen7+, r600, llvmpipe, softpipe, swr)
   GL_ARB_explicit_uniform_location                      DONE (all drivers that support GLSL)
   GL_ARB_framebuffer_no_attachments                     DONE (freedreno/a5xx, i965/gen7+, r600, softpipe)
   GL_ARB_program_interface_query                        DONE (all drivers)
index 842a952719b38214658b8082d580d80e6a9b8062..f7a7d92453b27c014d90cc9d90d8e99276cabe95 100644 (file)
@@ -112,6 +112,35 @@ fd4_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
        enum pc_di_src_sel src_sel;
        uint32_t idx_size, idx_offset;
 
+       if (info->indirect) {
+               struct fd_resource *ind = fd_resource(info->indirect->buffer);
+
+               emit_marker(ring, 7);
+
+               if (info->index_size) {
+                       struct pipe_resource *idx = info->index.resource;
+
+                       OUT_PKT3(ring, CP_DRAW_INDX_INDIRECT, 4);
+                       OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_DMA,
+                                       fd4_size2indextype(info->index_size), 0),
+                                       &batch->draw_patches);
+                       OUT_RELOC(ring, fd_resource(idx)->bo, index_offset, 0, 0);
+                       OUT_RING(ring, A4XX_CP_DRAW_INDX_INDIRECT_2_INDX_SIZE(
+                                                        idx->width0 - index_offset));
+                       OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
+               } else {
+                       OUT_PKT3(ring, CP_DRAW_INDIRECT, 2);
+                       OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
+                                       &batch->draw_patches);
+                       OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
+               }
+
+               emit_marker(ring, 7);
+               fd_reset_wfi(batch);
+
+               return;
+       }
+
        if (info->index_size) {
                assert(!info->has_user_indices);
 
index 62e4a574b9027725afa2bbd23cc4bef7a16f3c96..3fa28e3f3108b758f5570924fb443277b6197e53 100644 (file)
@@ -333,6 +333,10 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
                return 0;
 
        case PIPE_CAP_DRAW_INDIRECT:
+               if (is_a4xx(screen) || is_a5xx(screen))
+                       return 1;
+               return 0;
+
        case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
                if (is_a5xx(screen))
                        return 1;