* config/tc-aarch64.c (get_aarch64_insn): Avoid signed overflow.
* config/tc-metag.c (parse_dalu): Likewise.
* config/tc-tic4x.c (md_pcrel_from): Likewise.
* config/tc-tic6x.c (tic6x_output_unwinding): Likewise.
* config/tc-csky.c (parse_fexp): Use an unsigned char temp buffer.
Don't use register keyword. Avoid signed overflow and remove now
unneccesary char masks. Formatting.
* config/tc-ia64.c (operand_match): Don't use shifts to sign extend.
* config/tc-mep.c (mep_apply_fix): Likewise.
* config/tc-pru.c (md_apply_fix): Likewise.
* config/tc-riscv.c (load_const): Likewise.
* config/tc-nios2.c (md_apply_fix): Likewise. Don't potentially
truncate fixup before right shift. Tidy BFD_RELOC_NIOS2_HIADJ16
calculation.
+2019-12-12 Alan Modra <amodra@gmail.com>
+
+ * config/tc-aarch64.c (get_aarch64_insn): Avoid signed overflow.
+ * config/tc-metag.c (parse_dalu): Likewise.
+ * config/tc-tic4x.c (md_pcrel_from): Likewise.
+ * config/tc-tic6x.c (tic6x_output_unwinding): Likewise.
+ * config/tc-csky.c (parse_fexp): Use an unsigned char temp buffer.
+ Don't use register keyword. Avoid signed overflow and remove now
+ unneccesary char masks. Formatting.
+ * config/tc-ia64.c (operand_match): Don't use shifts to sign extend.
+ * config/tc-mep.c (mep_apply_fix): Likewise.
+ * config/tc-pru.c (md_apply_fix): Likewise.
+ * config/tc-riscv.c (load_const): Likewise.
+ * config/tc-nios2.c (md_apply_fix): Likewise. Don't potentially
+ truncate fixup before right shift. Tidy BFD_RELOC_NIOS2_HIADJ16
+ calculation.
+
2019-12-12 Alan Modra <amodra@gmail.com>
* config/obj-evax.c (crc32, encode_32, encode_16, decode_16):
{
unsigned char *where = (unsigned char *) buf;
uint32_t result;
- result = (where[0] | (where[1] << 8) | (where[2] << 16) | (where[3] << 24));
+ result = ((where[0] | (where[1] << 8) | (where[2] << 16)
+ | ((uint32_t) where[3] << 24)));
return result;
}
parse_fexp (char *s, expressionS *e, unsigned char isdouble, uint64_t *dbnum)
{
int length; /* Number of chars in an object. */
- register char const *err = NULL; /* Error from scanning float literal. */
- char temp[8];
+ const char *err = NULL; /* Error from scanning float literal. */
+ unsigned char temp[8];
/* input_line_pointer->1st char of a flonum (we hope!). */
input_line_pointer = s;
input_line_pointer += 2;
if (isdouble)
- err = md_atof ('d', temp, &length);
+ err = md_atof ('d', (char *) temp, &length);
else
- err = md_atof ('f', temp, &length);
+ err = md_atof ('f', (char *) temp, &length);
know (length <= 8);
know (err != NULL || length > 0);
{
uint32_t fnum;
if (target_big_endian)
- fnum = (((temp[0] << 24) & 0xffffffff)
- | ((temp[1] << 16) & 0xffffff)
- | ((temp[2] << 8) & 0xffff)
- | (temp[3] & 0xff));
+ fnum = (((uint32_t) temp[0] << 24)
+ | (temp[1] << 16)
+ | (temp[2] << 8)
+ | temp[3]);
else
- fnum = (((temp[3] << 24) & 0xffffffff)
- | ((temp[2] << 16) & 0xffffff)
- | ((temp[1] << 8) & 0xffff)
- | (temp[0] & 0xff));
- e->X_add_number = fnum; }
+ fnum = (((uint32_t) temp[3] << 24)
+ | (temp[2] << 16)
+ | (temp[1] << 8)
+ | temp[0]);
+ e->X_add_number = fnum;
+ }
else
{
if (target_big_endian)
{
- *dbnum = (((temp[0] << 24) & 0xffffffff)
- | ((temp[1] << 16) & 0xffffff)
- | ((temp[2] << 8) & 0xffff)
- | (temp[3] & 0xff));
+ *dbnum = (((uint32_t) temp[0] << 24)
+ | (temp[1] << 16)
+ | (temp[2] << 8)
+ | temp[3]);
*dbnum <<= 32;
- *dbnum |= (((temp[4] << 24) & 0xffffffff)
- | ((temp[5] << 16) & 0xffffff)
- | ((temp[6] << 8) & 0xffff)
- | (temp[7] & 0xff));
+ *dbnum |= (((uint32_t) temp[4] << 24)
+ | (temp[5] << 16)
+ | (temp[6] << 8)
+ | temp[7]);
}
else
{
- *dbnum = (((temp[7] << 24) & 0xffffffff)
- | ((temp[6] << 16) & 0xffffff)
- | ((temp[5] << 8) & 0xffff)
- | (temp[4] & 0xff));
+ *dbnum = (((uint32_t) temp[7] << 24)
+ | (temp[6] << 16)
+ | (temp[5] << 8)
+ | temp[4]);
*dbnum <<= 32;
- *dbnum |= (((temp[3] << 24) & 0xffffffff)
- | ((temp[2] << 16) & 0xffffff)
- | ((temp[1] << 8) & 0xffff)
- | (temp[0] & 0xff));
+ *dbnum |= (((uint32_t) temp[3] << 24)
+ | (temp[2] << 16)
+ | (temp[1] << 8)
+ | temp[0]);
}
}
return input_line_pointer;
/* Sign-extend 32-bit unsigned numbers, so that the following range
checks will work. */
val = e->X_add_number;
- if (((val & (~(bfd_vma) 0 << 32)) == 0)
- && ((val & ((bfd_vma) 1 << 31)) != 0))
- val = ((val << 32) >> 32);
+ if ((val & (~(bfd_vma) 0 << 32)) == 0)
+ val = (val ^ ((bfd_vma) 1 << 31)) - ((bfd_vma) 1 << 31);
/* Check for 0x100000000. This is valid because
0x100000000-1 is the same as ((uint32_t) -1). */
/* Sign-extend 32-bit unsigned numbers, so that the following range
checks will work. */
val = e->X_add_number;
- if (((val & (~(bfd_vma) 0 << 32)) == 0)
- && ((val & ((bfd_vma) 1 << 31)) != 0))
- val = ((val << 32) >> 32);
+ if ((val & (~(bfd_vma) 0 << 32)) == 0)
+ val = (val ^ ((bfd_vma) 1 << 31)) - ((bfd_vma) 1 << 31);
}
else
val = e->X_add_number;
switch (fixP->fx_cgen.opinfo)
{
case BFD_RELOC_MEP_LOW16:
- *valP = ((long)(*valP & 0xffff)) << 16 >> 16;
+ *valP = ((*valP & 0xffff) ^ 0x8000) - 0x8000;
break;
case BFD_RELOC_MEP_HI16U:
*valP >>= 16;
/* Only MOV instructions have a DSP register as a
destination. Set the MOV DSPe.r opcode. The simple
OR'ing is OK because the usual MOV opcode is 0x00. */
- insn->bits = (0x91 << 24);
+ insn->bits = 0x91u << 24;
du_shift = 0;
l1_shift = 2;
regs_shift[0] = 19;
du_shift = 0;
l1_shift = 2;
regs_shift[1] = 14;
- insn->bits = (0x92 << 24); /* Set opcode. */
+ insn->bits = 0x92u << 24; /* Set opcode. */
}
}
}
nios2_diagnose_overflow (fixup, howto, fixP, value);
/* Apply the right shift. */
- fixup = ((signed)fixup) >> howto->rightshift;
+ fixup = (offsetT) fixup >> howto->rightshift;
/* Truncate the fixup to right size. */
switch (fixP->fx_r_type)
fixup = fixup & 0xFFFF;
break;
case BFD_RELOC_NIOS2_HIADJ16:
- fixup = ((((fixup >> 16) & 0xFFFF) + ((fixup >> 15) & 0x01))
- & 0xFFFF);
+ fixup = ((fixup + 0x8000) >> 16) & 0xFFFF;
break;
default:
{
- int n = sizeof (fixup) * 8 - howto->bitsize;
- fixup = (fixup << n) >> n;
+ fixup &= ((valueT) 1 << howto->bitsize) - 1;
break;
}
}
{
unsigned char *where;
valueT value = *valP;
- long n;
/* Assert that the fixup is one we can handle. */
gas_assert (fixP != NULL && valP != NULL
pru_diagnose_overflow (fixup, howto, fixP, insn);
/* Apply the right shift. */
- fixup = ((offsetT)fixup) >> howto->rightshift;
+ fixup = (offsetT) fixup >> howto->rightshift;
/* Truncate the fixup to right size. */
- n = sizeof (fixup) * 8 - howto->bitsize;
- fixup = (fixup << n) >> n;
+ if (howto->bitsize == 0)
+ fixup = 0;
+ else
+ fixup &= ((valueT) 2 << (howto->bitsize - 1)) - 1;
/* Fix up the instruction. Non-contiguous bitfields need
special handling. */
load_const (int reg, expressionS *ep)
{
int shift = RISCV_IMM_BITS;
- bfd_vma upper_imm;
+ bfd_vma upper_imm, sign = (bfd_vma) 1 << (RISCV_IMM_BITS - 1);
expressionS upper = *ep, lower = *ep;
- lower.X_add_number = (int32_t) ep->X_add_number << (32-shift) >> (32-shift);
+ lower.X_add_number = ((ep->X_add_number & (sign + sign - 1)) ^ sign) - sign;
upper.X_add_number -= lower.X_add_number;
if (ep->X_op != O_constant)
unsigned int op;
buf = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
- op = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0];
+ op = ((unsigned) buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0];
return ((fixP->fx_where + fixP->fx_frag->fr_address) >> 2) +
tic4x_pc_offset (op);
if (unwind->personality_index == -1)
{
tmp = md_chars_to_number (unwind->frag_start + 4, 4);
- tmp |= ((unwind->data_bytes - 8) >> 2) << 24;
+ tmp |= (valueT) ((unwind->data_bytes - 8) >> 2) << 24;
md_number_to_chars (unwind->frag_start + 4, tmp, 4);
}
else if (unwind->personality_index == 1 || unwind->personality_index == 2)
projects / binutils-gdb.git / commitdiff