r300/compiler: Move declaration before code.
authorVinson Lee <vlee@vmware.com>
Wed, 29 Sep 2010 19:00:19 +0000 (12:00 -0700)
committerVinson Lee <vlee@vmware.com>
Wed, 29 Sep 2010 19:02:02 +0000 (12:02 -0700)
Fixes these GCC warnings on linux-x86 build.
radeon_pair_schedule.c: In function ‘emit_all_tex’:
radeon_pair_schedule.c:244: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘destructive_merge_instructions’:
radeon_pair_schedule.c:291: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c:438: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘scan_read’:
radeon_pair_schedule.c:619: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘scan_write’:
radeon_pair_schedule.c:645: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘schedule_block’:
radeon_pair_schedule.c:673: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘rc_pair_schedule’:
radeon_pair_schedule.c:730: warning: ISO C90 forbids mixed declarations and code

src/mesa/drivers/dri/r300/compiler/radeon_pair_schedule.c

index 38bae26f3c15b8aef9b773fef34828f112362f0e..bfe3553460e7d853afa4067bdef752bfa03f0616 100644 (file)
@@ -237,11 +237,12 @@ static void commit_alu_instruction(struct schedule_state * s, struct schedule_in
 static void emit_all_tex(struct schedule_state * s, struct rc_instruction * before)
 {
        struct schedule_instruction *readytex;
+       struct rc_instruction * inst_begin;
 
        assert(s->ReadyTEX);
 
        /* Node marker for R300 */
-       struct rc_instruction * inst_begin = rc_insert_new_instruction(s->C, before->Prev);
+       inst_begin = rc_insert_new_instruction(s->C, before->Prev);
        inst_begin->U.I.Opcode = RC_OPCODE_BEGIN_TEX;
 
        /* Link texture instructions back in */
@@ -280,6 +281,8 @@ static int destructive_merge_instructions(
                struct rc_pair_instruction * alpha)
 {
        const struct rc_opcode_info * opcode;
+       const struct rc_opcode_info * rgb_info;
+
        assert(rgb->Alpha.Opcode == RC_OPCODE_NOP);
        assert(alpha->RGB.Opcode == RC_OPCODE_NOP);
 
@@ -288,8 +291,7 @@ static int destructive_merge_instructions(
         * src1. */
 
        /* Merge the rgb presubtract registers. */
-       const struct rc_opcode_info * rgb_info =
-                                       rc_get_opcode_info(rgb->RGB.Opcode);
+       rgb_info = rc_get_opcode_info(rgb->RGB.Opcode);
        if (alpha->RGB.Src[RC_PAIR_PRESUB_SRC].Used) {
                unsigned int srcp_src;
                unsigned int srcp_regs;
@@ -424,6 +426,7 @@ static int destructive_merge_instructions(
                unsigned int oldsrc = alpha->Alpha.Arg[arg].Source;
                rc_register_file file = 0;
                unsigned int index = 0;
+               int source;
 
                if (alpha->Alpha.Arg[arg].Swizzle < 3) {
                        srcrgb = 1;
@@ -435,7 +438,7 @@ static int destructive_merge_instructions(
                        index = alpha->Alpha.Src[oldsrc].Index;
                }
 
-               int source = rc_pair_alloc_source(rgb, srcrgb, srcalpha, file, index);
+               source = rc_pair_alloc_source(rgb, srcrgb, srcalpha, file, index);
                if (source < 0)
                        return 0;
 
@@ -603,6 +606,7 @@ static void scan_read(void * data, struct rc_instruction * inst,
 {
        struct schedule_state * s = data;
        struct reg_value * v = get_reg_value(s, file, index, chan);
+       struct reg_value_reader * reader;
 
        if (!v)
                return;
@@ -616,7 +620,7 @@ static void scan_read(void * data, struct rc_instruction * inst,
 
        DBG("%i: read %i[%i] chan %i\n", s->Current->Instruction->IP, file, index, chan);
 
-       struct reg_value_reader * reader = memory_pool_malloc(&s->C->Pool, sizeof(*reader));
+       reader = memory_pool_malloc(&s->C->Pool, sizeof(*reader));
        reader->Reader = s->Current;
        reader->Next = v->Readers;
        v->Readers = reader;
@@ -636,13 +640,14 @@ static void scan_write(void * data, struct rc_instruction * inst,
 {
        struct schedule_state * s = data;
        struct reg_value ** pv = get_reg_valuep(s, file, index, chan);
+       struct reg_value * newv;
 
        if (!pv)
                return;
 
        DBG("%i: write %i[%i] chan %i\n", s->Current->Instruction->IP, file, index, chan);
 
-       struct reg_value * newv = memory_pool_malloc(&s->C->Pool, sizeof(*newv));
+       newv = memory_pool_malloc(&s->C->Pool, sizeof(*newv));
        memset(newv, 0, sizeof(*newv));
 
        newv->Writer = s->Current;
@@ -665,12 +670,13 @@ static void schedule_block(struct r300_fragment_program_compiler * c,
                struct rc_instruction * begin, struct rc_instruction * end)
 {
        struct schedule_state s;
+       unsigned int ip;
 
        memset(&s, 0, sizeof(s));
        s.C = &c->Base;
 
        /* Scan instructions for data dependencies */
-       unsigned int ip = 0;
+       ip = 0;
        for(struct rc_instruction * inst = begin; inst != end; inst = inst->Next) {
                s.Current = memory_pool_malloc(&c->Base.Pool, sizeof(*s.Current));
                memset(s.Current, 0, sizeof(struct schedule_instruction));
@@ -722,12 +728,14 @@ void rc_pair_schedule(struct radeon_compiler *cc, void *user)
        struct r300_fragment_program_compiler *c = (struct r300_fragment_program_compiler*)cc;
        struct rc_instruction * inst = c->Base.Program.Instructions.Next;
        while(inst != &c->Base.Program.Instructions) {
+               struct rc_instruction * first;
+
                if (is_controlflow(inst)) {
                        inst = inst->Next;
                        continue;
                }
 
-               struct rc_instruction * first = inst;
+               first = inst;
 
                while(inst != &c->Base.Program.Instructions && !is_controlflow(inst))
                        inst = inst->Next;