* config/tc-m68hc11.c (build_jump_insn): Allocate worst case storage

	for bra/bsr and use frag_variant(), this ensure that the possible
	16-bit BFD_RELOC_16 will be in the same frag.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 110b5fbb594bd5ba857cbaf7d33e8450cde05c44..c279bb03df6445a9ad860b0f53740b3e9b64b535 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2001-11-01  Stephane Carrez  <Stephane.Carrez@worldnet.fr>
+
+       * config/tc-m68hc11.c (build_jump_insn): Allocate worst case storage
+       for bra/bsr and use frag_variant(), this ensure that the possible
+       16-bit BFD_RELOC_16 will be in the same frag.
+
 2001-10-31  Chris Demetriou  <cgd@broadcom.com>
 
        * config/tc-mips.c (HAVE_32BIT_ADDRESSES): If compiling embedded

diff --git a/gas/config/tc-m68hc11.c b/gas/config/tc-m68hc11.c
index 43fe878ecc69316e04e4320c67559ffb04bcb313..0c7ccabac52d832cc1e1a8aff46700e353ab636a 100644 (file)
--- a/gas/config/tc-m68hc11.c
+++ b/gas/config/tc-m68hc11.c
@@ -1519,12 +1519,14 @@ build_jump_insn (opcode, operands, nb_operands, jmp_mode)
       /* bra/bsr made be changed into jmp/jsr.  */
       else if (code == M6811_BSR || code == M6811_BRA || code == M6812_BSR)
        {
-         opcode = m68hc11_new_insn (2);
+          /* Allocate worst case storage.  */
+         opcode = m68hc11_new_insn (3);
          number_to_chars_bigendian (opcode, code, 1);
          number_to_chars_bigendian (opcode + 1, 0, 1);
-         frag_var (rs_machine_dependent, 2, 1,
-                   ENCODE_RELAX (STATE_PC_RELATIVE, STATE_UNDF),
-                   operands[0].exp.X_add_symbol, (offsetT) n, opcode);
+         frag_variant (rs_machine_dependent, 1, 1,
+                        ENCODE_RELAX (STATE_PC_RELATIVE, STATE_UNDF),
+                        operands[0].exp.X_add_symbol, (offsetT) n,
+                        opcode);
        }
       else if (current_architecture & cpu6812)
        {