MSVC does not understand __builtin_unreachable

diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc
index 7905ea598e6bbe2bafacf8bea4e239509b03fbfa..ea23139e23ab7e5835a8feaf0e706bbce3ab7a82 100644 (file)
--- a/frontends/verilog/preproc.cc
+++ b/frontends/verilog/preproc.cc
@@ -591,7 +591,7 @@ read_define_args()
 
                default:
                        // The only FSM states are 0-2 and we dealt with 2 at the start of the loop.
-                       __builtin_unreachable();
+                       log_assert(false);
                }
        }