(no commit message)

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 731397533f95b382da7570dde4d16a60d483195a..6cbc0ef6692286974122ce40200239af5a11a5ff 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -611,7 +611,11 @@ of r6 therefore brings in an entirely new value *directly from
 memory*. Likewise on the second operand, r7, and likewise on
 the destination result which can be an automatic Coherent
 Store-and-increment
-directly into Memory.
+directly into Memory. In essence:
+
+*The act of "reading" or "writing" a register has been decoupled
+and intercepted, then connected transparently to a completely
+separate Coherent Memory Subsystem*
 
 On top of a barrel-architecture the slowness of Memory access
 was not a problem because the Deterministic nature of classic