re PR rtl-optimization/54472 (ICE (spill_failure): unable to find a register to spill...

	PR rtl-optimization/54472

	* sel-sched-ir.c (has_dependence_note_reg_set): Handle implicit sets.
	(has_dependence_note_reg_clobber,
	has_dependence_note_reg_use): Likewise.

	* gcc.dg/pr54472.c: New test.

From-SVN: r193358

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f8f19bad0e4667ae788c297c3cda067b70028163..37566fc02ea67fc93e5f7177f03255c40ae3ca74 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2012-11-09  Andrey Belevantsev  <abel@ispras.ru>
+
+       PR rtl-optimization/54472
+
+       * sel-sched-ir.c (has_dependence_note_reg_set): Handle implicit sets.
+       (has_dependence_note_reg_clobber,
+       has_dependence_note_reg_use): Likewise. 
+
 2012-11-09  Eric Botcazou  <ebotcazou@adacore.com>
 
        * config/i386/i386.c (release_scratch_register_on_entry): Also adjust

diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 7b0f51242cf4a3afce8151a215a4e1c626c5a14c..e0239dc3637b322e438056bc3c2d6c2590883ef9 100644 (file)
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -3185,7 +3185,7 @@ has_dependence_note_reg_set (int regno)
          || reg_last->clobbers != NULL)
        *dsp = (*dsp & ~SPECULATIVE) | DEP_OUTPUT;
 
-      if (reg_last->uses)
+      if (reg_last->uses || reg_last->implicit_sets)
        *dsp = (*dsp & ~SPECULATIVE) | DEP_ANTI;
     }
 }
@@ -3205,7 +3205,7 @@ has_dependence_note_reg_clobber (int regno)
       if (reg_last->sets)
        *dsp = (*dsp & ~SPECULATIVE) | DEP_OUTPUT;
 
-      if (reg_last->uses)
+      if (reg_last->uses || reg_last->implicit_sets)
        *dsp = (*dsp & ~SPECULATIVE) | DEP_ANTI;
     }
 }
@@ -3225,7 +3225,7 @@ has_dependence_note_reg_use (int regno)
       if (reg_last->sets)
        *dsp = (*dsp & ~SPECULATIVE) | DEP_TRUE;
 
-      if (reg_last->clobbers)
+      if (reg_last->clobbers || reg_last->implicit_sets)
        *dsp = (*dsp & ~SPECULATIVE) | DEP_ANTI;
 
       /* Merge BE_IN_SPEC bits into *DSP when the dependency producer

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 226c5f8cefe808c6562d99b6dfaf86b78938c0d4..cdf47a9b33b4df8504818cf2e7d85f7955b5e803 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2012-11-09  Andrey Belevantsev  <abel@ispras.ru>
+
+       PR rtl-optimization/54472
+       
+       * gcc.dg/pr54472.c: New test. 
+
 2012-11-09  Eric Botcazou  <ebotcazou@adacore.com>
 
        * gnat.dg/stack_check3.ad[sb]: New test.

diff --git a/gcc/testsuite/gcc.dg/pr54472.c b/gcc/testsuite/gcc.dg/pr54472.c
new file mode 100644 (file)
index 0000000..9395203
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr54472.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target powerpc*-*-* ia64-*-* x86_64-*-* } } */
+/* { dg-options "-O -fschedule-insns -fselective-scheduling" } */
+
+int main ()
+{
+  int a[3][3][3];
+  __builtin_memset (a, 0, sizeof a);
+  return 0;
+}