+2017-06-29 Naveen H.S <Naveen.Hurugalawadi@cavium.com>
+
+ * config/aarch64/aarch64.c (aarch_macro_fusion_pair_p): Push the
+ check for CC usage into AARCH64_FUSE_CMP_BRANCH.
+ * config/i386/i386.c (ix86_macro_fusion_pair_p): Push the check for
+ CC usage from generic code to here.
+ * sched-deps.c (sched_macro_fuse_insns): Move the condition for
+ CC usage into the target macros.
+
2017-06-29 Maya Rashish <coypu@sdf.org>
* config/netbsd.h (NETBSD_LIB_SPEC): Add -lc when creating shared
{
enum attr_type prev_type = get_attr_type (prev);
- /* FIXME: this misses some which is considered simple arthematic
- instructions for ThunderX. Simple shifts are missed here. */
- if (prev_type == TYPE_ALUS_SREG
- || prev_type == TYPE_ALUS_IMM
- || prev_type == TYPE_LOGICS_REG
- || prev_type == TYPE_LOGICS_IMM)
- return true;
+ unsigned int condreg1, condreg2;
+ rtx cc_reg_1;
+ aarch64_fixed_condition_code_regs (&condreg1, &condreg2);
+ cc_reg_1 = gen_rtx_REG (CCmode, condreg1);
+
+ if (reg_referenced_p (cc_reg_1, PATTERN (curr))
+ && prev
+ && modified_in_p (cc_reg_1, prev))
+ {
+ /* FIXME: this misses some which is considered simple arthematic
+ instructions for ThunderX. Simple shifts are missed here. */
+ if (prev_type == TYPE_ALUS_SREG
+ || prev_type == TYPE_ALUS_IMM
+ || prev_type == TYPE_LOGICS_REG
+ || prev_type == TYPE_LOGICS_IMM)
+ return true;
+ }
}
return false;
if (!any_condjump_p (condjmp))
return false;
+ unsigned int condreg1, condreg2;
+ rtx cc_reg_1;
+ ix86_fixed_condition_code_regs (&condreg1, &condreg2);
+ cc_reg_1 = gen_rtx_REG (CCmode, condreg1);
+ if (!reg_referenced_p (cc_reg_1, PATTERN (condjmp))
+ || !condgen
+ || !modified_in_p (cc_reg_1, condgen))
+ return false;
+
if (get_attr_type (condgen) != TYPE_TEST
&& get_attr_type (condgen) != TYPE_ICMP
&& get_attr_type (condgen) != TYPE_INCDEC
sched_macro_fuse_insns (rtx_insn *insn)
{
rtx_insn *prev;
-
+ prev = prev_nonnote_nondebug_insn (insn);
+ if (!prev)
+ return;
+
if (any_condjump_p (insn))
{
unsigned int condreg1, condreg2;
rtx cc_reg_1;
targetm.fixed_condition_code_regs (&condreg1, &condreg2);
cc_reg_1 = gen_rtx_REG (CCmode, condreg1);
- prev = prev_nonnote_nondebug_insn (insn);
- if (!reg_referenced_p (cc_reg_1, PATTERN (insn))
- || !prev
- || !modified_in_p (cc_reg_1, prev))
- return;
+ if (reg_referenced_p (cc_reg_1, PATTERN (insn))
+ && modified_in_p (cc_reg_1, prev))
+ {
+ if (targetm.sched.macro_fusion_pair_p (prev, insn))
+ SCHED_GROUP_P (insn) = 1;
+ return;
+ }
}
- else
- {
- rtx insn_set = single_set (insn);
-
- prev = prev_nonnote_nondebug_insn (insn);
- if (!prev
- || !insn_set
- || !single_set (prev))
- return;
+ if (single_set (insn) && single_set (prev))
+ {
+ if (targetm.sched.macro_fusion_pair_p (prev, insn))
+ SCHED_GROUP_P (insn) = 1;
}
-
- if (targetm.sched.macro_fusion_pair_p (prev, insn))
- SCHED_GROUP_P (insn) = 1;
-
}
/* Get the implicit reg pending clobbers for INSN and save them in TEMP. */