Fix generation of vorn and vbic for Neon.

From-SVN: r174266

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3e348cca419ef463a4891f01fda4dc63dda837f7..7f333e99f44c1d886576f677dc0ad641679342a5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2011-05-26  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
+
+       * config/arm/neon.md ("orn<mode>3_neon"): Canonicalize not.
+       ("orndi3_neon"): Likewise.
+       ("bic<mode>3_neon"): Likewise.
+
 2011-05-26  Ira Rosen  <ira.rosen@linaro.org>
 
        PR tree-optimization/49038
@@ -185,6 +191,7 @@
        * ipa.c (function_and_variable_visibility): Only add to same
        comdat group list if DECL_ONE_ONLY.
 
+>>>>>>> .r174265
 2011-05-25  Andrey Belevantsev  <abel@ispras.ru>
 
        PR rtl-optimization/49014

diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index cffd524344227f54788a1fde14bd144fc156188a..2dfa9c14ef33dc8acb9116f53dcecb85895ede51 100644 (file)
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -794,8 +794,8 @@
 
 (define_insn "orn<mode>3_neon"
   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
-       (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
-                (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))]
+       (ior:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))
+                (match_operand:VDQ 1 "s_register_operand" "w")))]
   "TARGET_NEON"
   "vorn\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
   [(set_attr "neon_type" "neon_int_1")]
@@ -803,8 +803,8 @@
 
 (define_insn "orndi3_neon"
   [(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?&r")
-       (ior:DI (match_operand:DI 1 "s_register_operand" "w,r,0")
-                (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r"))))]
+       (ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r"))
+               (match_operand:DI 1 "s_register_operand" "w,r,0")))]
   "TARGET_NEON"
   "@
    vorn\t%P0, %P1, %P2
@@ -816,8 +816,8 @@
 
 (define_insn "bic<mode>3_neon"
   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
-       (and:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
-                 (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))]
+       (and:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))
+                (match_operand:VDQ 1 "s_register_operand" "w")))]
   "TARGET_NEON"
   "vbic\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
   [(set_attr "neon_type" "neon_int_1")]

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 44ab3d0bebd0ef45620b74ddb3c95aea1676c7e9..bf6a2eeed0305d57ed0e1fdc5e871a37c034f461 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2011-05-26  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
+
+       * gcc.target/arm/neon-vorn-vbic.c: New test.
+
 2011-05-26  Ira Rosen  <ira.rosen@linaro.org>
 
        PR tree-optimization/49038

diff --git a/gcc/testsuite/gcc.target/arm/neon-vorn-vbic.c b/gcc/testsuite/gcc.target/arm/neon-vorn-vbic.c
new file mode 100644 (file)
index 0000000..6f2d20b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon-vorn-vbic.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O2 -ftree-vectorize" } */
+/* { dg-add-options arm_neon } */
+
+void bor (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b)
+{
+  int i;
+  for (i = 0; i < 9; i++)
+    c[i] = b[i] | (~a[i]);
+}
+void bic (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b)
+{
+  int i;
+  for (i = 0; i < 9; i++)
+    c[i] = b[i] & (~a[i]);
+}
+
+/* { dg-final { scan-assembler "vorn\\t" } } */
+/* { dg-final { scan-assembler "vbic\\t" } } */