soc: improve memory region conflict check

diff --git a/misoclib/soc/__init__.py b/misoclib/soc/__init__.py
index 21a0f1d78c90db073a2d4c824e5d4903316c41aa..d4d2dec22f4d57fd0ed52b1442bc524f7a938e07 100644 (file)
--- a/misoclib/soc/__init__.py
+++ b/misoclib/soc/__init__.py
@@ -133,13 +133,13 @@ class SoC(Module):
                        raise FinalizeError
                self._wb_slaves.append((address_decoder, interface))
 
-       def check_memory_region(self, name, origin):
+       def add_memory_region(self, name, origin, length):
+               def in_this_region(addr):
+                       return addr >= origin and addr < origin + length
                for n, o, l in self.memory_regions:
-                       if n == name or o == origin:
+                       if n == name or in_this_region(o) or in_this_region(o+l-1):
                                raise ValueError("Memory region conflict between {} and {}".format(n, name))
 
-       def add_memory_region(self, name, origin, length):
-               self.check_memory_region(name, origin)
                self.memory_regions.append((name, origin, length))
 
        def register_mem(self, name, address, interface, size=None):