Re: [libre-riscv-dev] Pinout, interfaces, Rudi, and Raptor

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+From: Staf Verhaegen <staf@fibraservi.eu>
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+Subject: Re: [libre-riscv-dev] Pinout, interfaces, Rudi, and Raptor
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+Yehowshua schreef op vr 08-05-2020 om 10:20 [-0400]:
+> Hello Luke,  So I see we have some pinout sdefine here.
+> https://libre-soc.org/shakti/m_class/pinouts/ <https://libre-soc.org/shak=
+ti/m_class/pinouts/>
+>=20
+> My suggestion is to drop the pinmux for now. We should probably update th=
+at page(or create a similar page) to reflect what we=E2=80=99re targeting f=
+or October.
+> IIRC, we=E2=80=99re targeting QFP. I don=E2=80=99t see the dimensions or =
+form factor we=E2=80=99re targeting listed there however. We should talk ab=
+out that.
+> Also, talked with Tim and SDR could work for the first SBC. LiteX also su=
+pports SDR which is good for us as it doesn=E2=80=99t require a PHY like DD=
+R making it simpler.
+
+You refer to a first SBC preferably low-cost. The October prototype tape-ou=
+t will not be cost-effective for that. It is a multi-project wafer. You can=
+ order extra wafers but it does mean that the cost of that wafer is divided=
+ over much less devices; meaning the cost will be around $32 per chip and s=
+ome of them will not be functional; in microelectrics you never have 100% y=
+ield. Also I think there is limit on only be able to get at most 1000 chips=
+ this way.
+
+If you want lower cost per unit you need to go for a full mask with a so-ca=
+lled engineering lot of 12 wafers. This will have a high startup cost. A fi=
+rst crude estimation is between $70000 and $75000. This give a few thousand=
+ of chips; exact number depends on the size of the chip. An extra engineeri=
+ng lot of 12 wafers will be around $18000.
+For this it means you will need to a new tape-out so you can add extra peri=
+pherals that were not on the prototype tape-out.
+
+greets,
+Staf.
+
+
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