;; A subset is vec_setv4sf.
(define_insn "*vec_setv4sf_sse4_1"
- [(set (match_operand:V4SF 0 "register_operand" "=Yr,*x,x")
+ [(set (match_operand:V4SF 0 "register_operand" "=Yr,*x,v")
(vec_merge:V4SF
(vec_duplicate:V4SF
- (match_operand:SF 2 "nonimmediate_operand" "Yrm,*xm,xm"))
- (match_operand:V4SF 1 "register_operand" "0,0,x")
+ (match_operand:SF 2 "nonimmediate_operand" "Yrm,*xm,vm"))
+ (match_operand:V4SF 1 "register_operand" "0,0,v")
(match_operand:SI 3 "const_int_operand")))]
"TARGET_SSE4_1
&& ((unsigned) exact_log2 (INTVAL (operands[3]))
(set_attr "prefix_data16" "1,1,*")
(set_attr "prefix_extra" "1")
(set_attr "length_immediate" "1")
- (set_attr "prefix" "orig,orig,vex")
+ (set_attr "prefix" "orig,orig,maybe_evex")
(set_attr "mode" "V4SF")])
(define_insn "sse4_1_insertps"
- [(set (match_operand:V4SF 0 "register_operand" "=Yr,*x,x")
- (unspec:V4SF [(match_operand:V4SF 2 "nonimmediate_operand" "Yrm,*xm,xm")
- (match_operand:V4SF 1 "register_operand" "0,0,x")
+ [(set (match_operand:V4SF 0 "register_operand" "=Yr,*x,v")
+ (unspec:V4SF [(match_operand:V4SF 2 "nonimmediate_operand" "Yrm,*xm,vm")
+ (match_operand:V4SF 1 "register_operand" "0,0,v")
(match_operand:SI 3 "const_0_to_255_operand" "n,n,n")]
UNSPEC_INSERTPS))]
"TARGET_SSE4_1"
(set_attr "prefix_data16" "1,1,*")
(set_attr "prefix_extra" "1")
(set_attr "length_immediate" "1")
- (set_attr "prefix" "orig,orig,vex")
+ (set_attr "prefix" "orig,orig,maybe_evex")
(set_attr "mode" "V4SF")])
(define_split
--- /dev/null
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx512vl" } */
+
+#include <x86intrin.h>
+
+__m128
+f1 (__m128 a, __m128 b)
+{
+ register __m128 c __asm ("xmm16") = a;
+ asm volatile ("" : "+v" (c));
+ c = _mm_insert_ps (c, b, 1);
+ asm volatile ("" : "+v" (c));
+ return c;
+}
+
+/* { dg-final { scan-assembler "vinsertps\[^\n\r\]*xmm16" } } */
+
+__v4sf
+f2 (__v4sf a, float b)
+{
+ register __v4sf c __asm ("xmm17") = a;
+ asm volatile ("" : "+v" (c));
+ c[1] = b;
+ asm volatile ("" : "+v" (c));
+ return c;
+}
+
+/* { dg-final { scan-assembler "vinsertps\[^\n\r\]*xmm17" } } */
+
+__v4sf
+f3 (__v4sf a, float b)
+{
+ register float c __asm ("xmm18") = b;
+ asm volatile ("" : "+v" (c));
+ a[1] = c;
+ return a;
+}
+
+/* { dg-final { scan-assembler "vinsertps\[^\n\r\]*xmm18" } } */