re PR target/46098 (ICE: in extract_insn, at recog.c:2100 with -msse3 -ffloat-store...

	PR target/46098
	* config/i386/i386.c (ix86_expand_special_args_builtin): Always
	generate target register for "load" class builtins.

	Revert:
	2010-10-22  Uros Bizjak  <ubizjak@gmail.com>

	PR target/46098
	* config/i386/sse.md (*avx_movu<ssemodesuffix><avxmodesuffix>):
	Rename from avx_movu<ssemodesuffix><avxmodesuffix>.
	(avx_movu<ssemodesuffix><avxmodesuffix>): New expander.
	(*<sse>_movu<ssemodesuffix>): Rename from <sse>_movu<ssemodesuffix>.
	(<sse>_movu<ssemodesuffix>): New expander.
	(*avx_movdqu<avxmodesuffix>): Rename from avx_movdqu<avxmodesuffix>.
	(avx_movdqu<avxmodesuffix>): New expander.
	(*sse2_movdqu): Rename from sse2_movdqu.
	(sse2_movdqu): New expander.

testsuite/ChangeLog:

	* gcc.target/i386/avx256-unaligned-load-[1234].c: Update scan strings.
	* gcc.target/i386/avx256-unaligned-store-[1234].c: Ditto.

From-SVN: r187481

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dc9b9a1617be64f505eb8ac7796749e973d5e4aa..9ea11a0f48657210c5c6403cef3ee905aed012e9 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,23 @@
+2012-05-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/46098
+       * config/i386/i386.c (ix86_expand_special_args_builtin): Always
+       generate target register for "load" class builtins.
+
+       Revert:
+       2010-10-22  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/46098
+       * config/i386/sse.md (*avx_movu<ssemodesuffix><avxmodesuffix>):
+       Rename from avx_movu<ssemodesuffix><avxmodesuffix>.
+       (avx_movu<ssemodesuffix><avxmodesuffix>): New expander.
+       (*<sse>_movu<ssemodesuffix>): Rename from <sse>_movu<ssemodesuffix>.
+       (<sse>_movu<ssemodesuffix>): New expander.
+       (*avx_movdqu<avxmodesuffix>): Rename from avx_movdqu<avxmodesuffix>.
+       (avx_movdqu<avxmodesuffix>): New expander.
+       (*sse2_movdqu): Rename from sse2_movdqu.
+       (sse2_movdqu): New expander.
+
 2012-05-14  Marc Glisse  <marc.glisse@inria.fr>
 
        PR target/52607
@@ -11,8 +31,7 @@
            Jakub Jelinek  <jakub@redhat.com>
 
        PR target/53315
-       * config/i386/i386.md (xbegin_1): Use + in constraint and
-       match_dup.
+       * config/i386/i386.md (xbegin_1): Use + in constraint and match_dup.
        (xbegin): Updated.
 
 2012-05-14  Jakub Jelinek  <jakub@redhat.com>
@@ -250,12 +269,12 @@
        * opth-gen.awk: Declare common_handle_option_auto.
        * common.opt (Wuninitialized): Use EnabledBy. Delete Init.
        (Wmaybe-uninitialized): Likewise.
-        (Wunused-but-set-variable): Likewise.
-        (Wunused-function): Likewise.
-        (Wunused-label): Likewise.
-        (Wunused-value): Likewise.
-        (Wunused-variable): Likewise.
-        * opt-read.awk: Create opt_numbers array.
+       (Wunused-but-set-variable): Likewise.
+       (Wunused-function): Likewise.
+       (Wunused-label): Likewise.
+       (Wunused-value): Likewise.
+       (Wunused-variable): Likewise.
+       * opt-read.awk: Create opt_numbers array.
 
 2012-05-11  Richard Guenther  <rguenther@suse.de>
 
@@ -447,7 +466,7 @@
 
 2012-05-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>
 
-       * doc/extend.texi (Function Attributes): Point xref to section
+       * doc/extend.texi (Function Attributes): Point xref to section
        about Pragmas.
 
 2012-05-09  Uros Bizjak  <ubizjak@gmail.com>

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 6cc64fb03388d41eee16e539c34f2739a4847d53..eca542c7a19bca2daf5d8de3bc3a27676860d149 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -29472,8 +29472,8 @@ ix86_expand_special_args_builtin (const struct builtin_description *d,
       arg_adjust = 0;
       if (optimize
          || target == 0
-         || GET_MODE (target) != tmode
-         || !insn_p->operand[0].predicate (target, tmode))
+         || !register_operand (target, tmode)
+         || GET_MODE (target) != tmode)
        target = gen_reg_rtx (tmode);
     }
 

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 70cced4ca7ca84e933d9273fa68c2286d2c8bf0b..6a8206aa83154cbdc3c88e0b29cfee5a09eddf2b 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -588,18 +588,7 @@
   DONE;
 })
 
-(define_expand "<sse>_movu<ssemodesuffix><avxsizesuffix>"
-  [(set (match_operand:VF 0 "nonimmediate_operand")
-       (unspec:VF
-         [(match_operand:VF 1 "nonimmediate_operand")]
-         UNSPEC_MOVU))]
-  "TARGET_SSE"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (<MODE>mode, operands[1]);
-})
-
-(define_insn "*<sse>_movu<ssemodesuffix><avxsizesuffix>"
+(define_insn "<sse>_movu<ssemodesuffix><avxsizesuffix>"
   [(set (match_operand:VF 0 "nonimmediate_operand" "=x,m")
        (unspec:VF
          [(match_operand:VF 1 "nonimmediate_operand" "xm,x")]
@@ -631,17 +620,7 @@
              ]
              (const_string "<MODE>")))])
 
-(define_expand "<sse2>_movdqu<avxsizesuffix>"
-  [(set (match_operand:VI1 0 "nonimmediate_operand")
-       (unspec:VI1 [(match_operand:VI1 1 "nonimmediate_operand")]
-                   UNSPEC_MOVU))]
-  "TARGET_SSE2"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (<MODE>mode, operands[1]);
-})
-
-(define_insn "*<sse2>_movdqu<avxsizesuffix>"
+(define_insn "<sse2>_movdqu<avxsizesuffix>"
   [(set (match_operand:VI1 0 "nonimmediate_operand" "=x,m")
        (unspec:VI1 [(match_operand:VI1 1 "nonimmediate_operand" "xm,x")]
                    UNSPEC_MOVU))]

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d6a2adfe77d8ceeb804f267d53a83bfff46effa0..7fc8f0eef5eb4ae5e7e26585e4cb2ff0c3d46073 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-05-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       * gcc.target/i386/avx256-unaligned-load-[1234].c: Update scan strings.
+       * gcc.target/i386/avx256-unaligned-store-[1234].c: Ditto.
+
 2012-05-14  Janne Blomqvist  <jb@gcc.gnu.org>
 
        PR fortran/52428

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
index c909b9402ccdf77207e2e5ebbf47f89cedbe6cb1..c2511c643b439c73c6a471a8f0295a1916b3533a 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
@@ -14,6 +14,6 @@ avx_test (void)
     c[i] = a[i] * b[i+3];
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movups256/1" } } */
-/* { dg-final { scan-assembler "\\*sse_movups/1" } } */
+/* { dg-final { scan-assembler-not "avx_movups256/1" } } */
+/* { dg-final { scan-assembler "sse_movups/1" } } */
 /* { dg-final { scan-assembler "vinsertf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
index f1d79793ff8f31e4f8eefa3b71617fc81aacb18b..9d7167304e35b0ce4dcdaeb1e27514342460ffec 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
@@ -24,6 +24,6 @@ avx_test (void)
     }
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movdqu256/1" } } */
-/* { dg-final { scan-assembler "\\*sse2_movdqu/1" } } */
+/* { dg-final { scan-assembler-not "avx_movdqu256/1" } } */
+/* { dg-final { scan-assembler "sse2_movdqu/1" } } */
 /* { dg-final { scan-assembler "vinsert.128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
index fe362480b603145bdddc745f314fe96653b600bd..efb5f573fae296f2182ef674bd387f454c3ec683 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
@@ -14,6 +14,6 @@ avx_test (void)
     c[i] = a[i] * b[i+3];
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movupd256/1" } } */
-/* { dg-final { scan-assembler "\\*sse2_movupd/1" } } */
+/* { dg-final { scan-assembler-not "avx_movupd256/1" } } */
+/* { dg-final { scan-assembler "sse2_movupd/1" } } */
 /* { dg-final { scan-assembler "vinsertf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
index 2c087a17e37a9098559a874a2de7efe4d4a11f7d..e527b381625277e6d34037bf14c52d7bc5927dda 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
@@ -14,6 +14,6 @@ avx_test (void)
     b[i] = a[i+3] * 2;
 }
 
-/* { dg-final { scan-assembler "\\*avx_movups256/1" } } */
-/* { dg-final { scan-assembler-not "\\*avx_movups/1" } } */
+/* { dg-final { scan-assembler "avx_movups256/1" } } */
+/* { dg-final { scan-assembler-not "avx_movups/1" } } */
 /* { dg-final { scan-assembler-not "vinsertf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
index 6af02a2202b6cc12515bd075be3d013105ca331e..0b5839669a7fdc7154f2f8ec839ee0ebe9bf9962 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
@@ -17,6 +17,6 @@ avx_test (void)
     d[i] = c[i] * 20.0;
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movups256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movups256/2" } } */
 /* { dg-final { scan-assembler "vmovups.*\\*movv4sf_internal/3" } } */
 /* { dg-final { scan-assembler "vextractf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
index 3339cc5e703e2ac24017a0a587c6740af5f0de7e..eac460fef9765f09656d3b9e3ada750da333087c 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
@@ -24,6 +24,6 @@ avx_test (void)
     }
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movdqu256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movdqu256/2" } } */
 /* { dg-final { scan-assembler "vmovdqu.*\\*movv16qi_internal/3" } } */
 /* { dg-final { scan-assembler "vextract.128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
index 8ecd363348e9e500a73dd0951da6511934180839..753625892d7356c2db872e3a8c6312aa9ba7f423 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
@@ -17,6 +17,6 @@ avx_test (void)
     d[i] = c[i] * 20.0;
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movupd256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movupd256/2" } } */
 /* { dg-final { scan-assembler "vmovupd.*\\*movv2df_internal/3" } } */
 /* { dg-final { scan-assembler "vextractf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
index 96cca66ae9c7afdb6b3f6e54cc54e360896169f6..39b6f3bef16935428735e4089a2643b9f3e85673 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
@@ -14,7 +14,7 @@ avx_test (void)
     b[i+3] = a[i] * c[i];
 }
 
-/* { dg-final { scan-assembler "\\*avx_movups256/2" } } */
-/* { dg-final { scan-assembler-not "\\*avx_movups/2" } } */
+/* { dg-final { scan-assembler "avx_movups256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movups/2" } } */
 /* { dg-final { scan-assembler-not "\\*avx_movv4sf_internal/3" } } */
 /* { dg-final { scan-assembler-not "vextractf128" } } */