unsigned group_bytes;
};
-enum radeon_family r600_get_family(struct radeon *rw);
-enum chip_class r600_get_family_class(struct radeon *radeon);
-
struct r600_resource {
struct u_vbuf_resource b;
rctx->screen = rscreen;
rctx->ws = rscreen->ws;
rctx->radeon = rscreen->radeon;
- rctx->family = r600_get_family(rctx->radeon);
- rctx->chip_class = r600_get_family_class(rctx->radeon);
+ rctx->family = rscreen->family;
+ rctx->chip_class = rscreen->chip_class;
rctx->fences.bo = NULL;
rctx->fences.data = NULL;
static const char* r600_get_name(struct pipe_screen* pscreen)
{
struct r600_screen *rscreen = (struct r600_screen *)pscreen;
- enum radeon_family family = r600_get_family(rscreen->radeon);
- return r600_get_family_name(family);
+ return r600_get_family_name(rscreen->family);
}
static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
{
struct r600_screen *rscreen = (struct r600_screen *)pscreen;
- enum radeon_family family = r600_get_family(rscreen->radeon);
+ enum radeon_family family = rscreen->family;
switch (param) {
/* Supported features (boolean caps). */
static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
{
struct r600_screen *rscreen = (struct r600_screen *)pscreen;
- enum radeon_family family = r600_get_family(rscreen->radeon);
+ enum radeon_family family = rscreen->family;
switch (param) {
case PIPE_CAP_MAX_LINE_WIDTH:
uint32_t tiling_config = rscreen->info.r600_tiling_config;
/* set default group bytes, overridden by tiling info ioctl */
- if (r600_get_family_class(rscreen->radeon) <= R700) {
+ if (rscreen->chip_class <= R700) {
rscreen->tiling_info.group_bytes = 256;
} else {
rscreen->tiling_info.group_bytes = 512;
if (!tiling_config)
return 0;
- if (r600_get_family_class(rscreen->radeon) <= R700) {
+ if (rscreen->chip_class <= R700) {
return r600_interpret_tiling(rscreen, tiling_config);
} else {
return evergreen_interpret_tiling(rscreen, tiling_config);
}
}
+static unsigned radeon_family_from_device(unsigned device)
+{
+ switch (device) {
+#define CHIPSET(pciid, name, family) case pciid: return CHIP_##family;
+#include "pci_ids/r600_pci_ids.h"
+#undef CHIPSET
+ default:
+ return CHIP_UNKNOWN;
+ }
+}
+
struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
{
struct r600_screen *rscreen;
rscreen->radeon = radeon;
ws->query_info(ws, &rscreen->info);
+ rscreen->family = radeon_family_from_device(rscreen->info.pci_id);
+ if (rscreen->family == CHIP_UNKNOWN) {
+ fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->info.pci_id);
+ radeon_destroy(radeon);
+ FREE(rscreen);
+ return NULL;
+ }
+
+ /* setup class */
+ if (rscreen->family == CHIP_CAYMAN) {
+ rscreen->chip_class = CAYMAN;
+ } else if (rscreen->family >= CHIP_CEDAR) {
+ rscreen->chip_class = EVERGREEN;
+ } else if (rscreen->family >= CHIP_RV770) {
+ rscreen->chip_class = R700;
+ } else {
+ rscreen->chip_class = R600;
+ }
+
if (r600_init_tiling(rscreen)) {
radeon_destroy(radeon);
FREE(rscreen);
rscreen->screen.get_shader_param = r600_get_shader_param;
rscreen->screen.get_paramf = r600_get_paramf;
rscreen->screen.get_video_param = r600_get_video_param;
- if (r600_get_family_class(radeon) >= EVERGREEN) {
+ if (rscreen->chip_class >= EVERGREEN) {
rscreen->screen.is_format_supported = evergreen_is_format_supported;
} else {
rscreen->screen.is_format_supported = r600_is_format_supported;
struct pipe_screen screen;
struct radeon_winsys *ws;
struct radeon *radeon;
+ unsigned family;
+ enum chip_class chip_class;
struct radeon_info info;
struct r600_tiling_info tiling_info;
struct util_slab_mempool pool_buffers;
unsigned array_mode)
{
struct pipe_resource *ptex = &rtex->resource.b.b.b;
- struct radeon *radeon = ((struct r600_screen*)screen)->radeon;
- enum chip_class chipc = r600_get_family_class(radeon);
+ enum chip_class chipc = ((struct r600_screen*)screen)->chip_class;
unsigned size, layer_size, i, offset;
unsigned nblocksx, nblocksy;
/* We must split depth and stencil into two separate buffers on Evergreen. */
if (!(base->flags & R600_RESOURCE_FLAG_TRANSFER) &&
- r600_get_family_class(((struct r600_screen*)screen)->radeon) >= EVERGREEN &&
+ ((struct r600_screen*)screen)->chip_class >= EVERGREEN &&
util_format_is_depth_and_stencil(base->format)) {
struct pipe_resource stencil;
unsigned stencil_pitch_override = 0;
*/
#include "r600.h"
#include "r600_priv.h"
+#include "r600_pipe.h"
#include "evergreend.h"
#include "util/u_memory.h"
#include <errno.h>
}
/* add blocks */
- if (radeon->family == CHIP_CAYMAN)
+ if (ctx->screen->family == CHIP_CAYMAN)
r = r600_context_add_block(ctx, cayman_config_reg_list,
Elements(cayman_config_reg_list), PKT3_SET_CONFIG_REG, EVERGREEN_CONFIG_REG_OFFSET);
else
Elements(evergreen_config_reg_list), PKT3_SET_CONFIG_REG, EVERGREEN_CONFIG_REG_OFFSET);
if (r)
goto out_err;
- if (radeon->family == CHIP_CAYMAN)
+ if (ctx->screen->family == CHIP_CAYMAN)
r = r600_context_add_block(ctx, cayman_context_reg_list,
Elements(cayman_context_reg_list), PKT3_SET_CONTEXT_REG, EVERGREEN_CONTEXT_REG_OFFSET);
else
#include "util/u_memory.h"
#include <errno.h>
-enum radeon_family r600_get_family(struct radeon *r600)
-{
- return r600->family;
-}
-
-enum chip_class r600_get_family_class(struct radeon *radeon)
-{
- return radeon->chip_class;
-}
-
-static unsigned radeon_family_from_device(unsigned device)
-{
- switch (device) {
-#define CHIPSET(pciid, name, family) case pciid: return CHIP_##family;
-#include "pci_ids/r600_pci_ids.h"
-#undef CHIPSET
- default:
- return CHIP_UNKNOWN;
- }
-}
-
struct radeon *radeon_create(struct radeon_winsys *ws)
{
struct radeon *radeon = CALLOC_STRUCT(radeon);
radeon->ws = ws;
ws->query_info(ws, &radeon->info);
- radeon->family = radeon_family_from_device(radeon->info.pci_id);
- if (radeon->family == CHIP_UNKNOWN) {
- fprintf(stderr, "Unknown chipset 0x%04X\n", radeon->info.pci_id);
- radeon_destroy(radeon);
- return NULL;
- }
-
- /* setup class */
- if (radeon->family == CHIP_CAYMAN) {
- radeon->chip_class = CAYMAN;
- } else if (radeon->family >= CHIP_CEDAR) {
- radeon->chip_class = EVERGREEN;
- } else if (radeon->family >= CHIP_RV770) {
- radeon->chip_class = R700;
- } else {
- radeon->chip_class = R600;
- }
-
return radeon;
}
unsigned backend_map = ctx->radeon->info.r600_backend_map;
unsigned item_width, item_mask;
- if (ctx->radeon->chip_class >= EVERGREEN) {
+ if (ctx->screen->chip_class >= EVERGREEN) {
item_width = 4;
item_mask = 0x7;
} else {
void r600_init_cs(struct r600_context *ctx)
{
/* R6xx requires this packet at the start of each command buffer */
- if (ctx->radeon->family < CHIP_RV770) {
+ if (ctx->screen->family < CHIP_RV770) {
ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_START_3D_CMDBUF, 0, 0);
ctx->pm4[ctx->pm4_cdwords++] = 0x00000000;
}
}
block->reloc[block->nbo].bo_pm4_index = block->pm4_ndwords - 1;
}
- if ((ctx->radeon->family > CHIP_R600) &&
- (ctx->radeon->family < CHIP_RV770) && reg[i+j].flags & REG_FLAG_RV6XX_SBU) {
+ if ((ctx->screen->family > CHIP_R600) &&
+ (ctx->screen->family < CHIP_RV770) && reg[i+j].flags & REG_FLAG_RV6XX_SBU) {
block->pm4[block->pm4_ndwords++] = PKT3(PKT3_SURFACE_BASE_UPDATE, 0, 0);
block->pm4[block->pm4_ndwords++] = reg[i+j].flush_flags;
}
}
/* ignore regs not on R600 on R600 */
- if ((reg[i].flags & REG_FLAG_NOT_R600) && ctx->radeon->family == CHIP_R600) {
+ if ((reg[i].flags & REG_FLAG_NOT_R600) && ctx->screen->family == CHIP_R600) {
n = 1;
continue;
}
return;
}
- if ((ctx->radeon->family < CHIP_RV770) &&
+ if ((ctx->screen->family < CHIP_RV770) &&
(G_0085F0_CB_ACTION_ENA(flush_flags) ||
G_0085F0_DB_ACTION_ENA(flush_flags))) {
if (ctx->flags & R600_CONTEXT_CHECK_EVENT_FLUSH) {
/* the rv670 seems to fail fbo-generatemipmap unless we flush the CB1 dest base ena */
if ((bo->cs_buf->binding & BO_BOUND_TEXTURE) &&
(flush_flags & S_0085F0_CB_ACTION_ENA(1))) {
- if ((ctx->radeon->family == CHIP_RV670) ||
- (ctx->radeon->family == CHIP_RS780) ||
- (ctx->radeon->family == CHIP_RS880)) {
+ if ((ctx->screen->family == CHIP_RV670) ||
+ (ctx->screen->family == CHIP_RS780) ||
+ (ctx->screen->family == CHIP_RS880)) {
ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_SURFACE_SYNC, 3, ctx->predicate_drawing);
ctx->pm4[ctx->pm4_cdwords++] = S_0085F0_CB1_DEST_BASE_ENA(1); /* CP_COHER_CNTL */
ctx->pm4[ctx->pm4_cdwords++] = 0xffffffff; /* CP_COHER_SIZE */
void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, struct r600_block *block)
{
int dirty;
- int num_regs = ctx->radeon->chip_class >= EVERGREEN ? 8 : 7;
+ int num_regs = ctx->screen->chip_class >= EVERGREEN ? 8 : 7;
boolean is_vertex;
if (state == NULL) {
/* queries need some special values */
if (ctx->num_query_running) {
- if (ctx->radeon->family >= CHIP_RV770) {
+ if (ctx->screen->family >= CHIP_RV770) {
r600_context_reg(ctx,
R_028D0C_DB_RENDER_CONTROL,
S_028D0C_R700_PERFECT_ZPASS_COUNTS(1),
/* suspend queries */
r600_context_queries_suspend(ctx);
- if (ctx->radeon->chip_class >= EVERGREEN)
+ if (ctx->screen->chip_class >= EVERGREEN)
evergreen_context_flush_dest_caches(ctx);
else
r600_context_flush_dest_caches(ctx);
struct radeon {
struct radeon_winsys *ws;
struct radeon_info info;
- unsigned family;
- enum chip_class chip_class;
};
/* these flags are used in register flags and added into block flags */