def write_b(uart, data):
- uart.write(pack('B',data))
+ uart.write(pack('B', data))
class LiteScopeUARTDriver:
def __len__(self):
l = 0
for var in self.vars:
- l = max(len(var),l)
+ l = max(len(var), l)
return l
if __name__ == '__main__':
dump = CSVDump()
- dump.add(Var("foo1", 1, [0,1,0,1,0,1]))
- dump.add(Var("foo2", 2, [1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0]))
+ dump.add(Var("foo1", 1, [0, 1, 0, 1, 0, 1]))
+ dump.add(Var("foo2", 2, [1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0]))
ramp = [i%128 for i in range(1024)]
dump.add(Var("ramp", 16, ramp))
dump.write("dump.csv")
if __name__ == '__main__':
dump = PythonDump()
- dump.add(Var("foo1", 1, [0,1,0,1,0,1]))
- dump.add(Var("foo2", 2, [1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0]))
+ dump.add(Var("foo1", 1, [0, 1, 0, 1, 0, 1]))
+ dump.add(Var("foo2", 2, [1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0]))
ramp = [i%128 for i in range(1024)]
dump.add(Var("ramp", 16, ramp))
dump.write("dump.py")
if __name__ == '__main__':
dump = SigrokDump()
- dump.add(Var("foo1", 1, [0,1,0,1,0,1]))
- dump.add(Var("foo2", 2, [1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0]))
+ dump.add(Var("foo1", 1, [0, 1, 0, 1, 0, 1]))
+ dump.add(Var("foo2", 2, [1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0]))
ramp = [i%128 for i in range(1024)]
dump.add(Var("ramp", 16, ramp))
dump.write("dump.sr")
if __name__ == '__main__':
dump = VCDDump()
- dump.add(Var("foo1", 1, [0,1,0,1,0,1]))
- dump.add(Var("foo2", 2, [1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0]))
+ dump.add(Var("foo1", 1, [0, 1, 0, 1, 0, 1]))
+ dump.add(Var("foo2", 2, [1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0]))
ramp = [i%128 for i in range(1024)]
dump.add(Var("ramp", 16, ramp))
dump.write("dump.vcd")