(no commit message)

diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 25bab115bdeb6700c77faaad3b6f3c5b10055b40..83acd920208b6c36a7d882f73a4cad4eb6ad40af 100644 (file)
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -325,7 +325,7 @@ disables SV (`scalar identity behaviour`).
 | 1         | MASK/MASK_SRC are encoded using CR-based Predication |
 
 Integer Twin predication has a second set of 3 bits that uses the same
-encoding thus allowing either the same register (r3 or r10) to be used
+encoding thus allowing either the same register (r3, r10 or r31) to be used
 for both src and dest, or different regs (one for src, one for dest).
 
 Likewise CR based twin predication has a second set of 3 bits, allowing