MIPS: Add the lo register to the clobber list in the madd-8.c and msub-8.c testcases.

The lo register is not listed in the clobber list in the inline asm statement
for the madd-8.c and msub-8.c testcases.  This means that when building for the
n64 ABI GCC is free to use the lo register instead of the stack when
saving/restoring the clobbered registers.  Then then means that it decides to
use the msub/madd instruction to perform the "x - y * z" operation rather than
using mul; addu/subu which the test is looking for.

testsuite/
	* gcc.target/mips/madd-8.c: Add lo register to clobber list.
	* gcc.target/mips/msub-8.c: Ditto.

From-SVN: r227299

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 93e13840f2ada9504f51f2820ba7c90f6cfdb385..a6f1ce8984ed04d2251084638b7a17292b987aff 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-08-28  Andrew Bennett  <andrew.bennett@imgtec.com>
+
+       * gcc.target/mips/madd-8.c: Add lo register to clobber list. 
+       * gcc.target/mips/msub-8.c: Ditto
+
 2015-08-27  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 
        * lib/target-supports.exp (check-effective_target_vect_double):

diff --git a/gcc/testsuite/gcc.target/mips/madd-8.c b/gcc/testsuite/gcc.target/mips/madd-8.c
index 794a6ff1727ca04cafd9794d3568518b3f65cdb1..56c194788a184f4940468f0403a69c047b11d215 100644 (file)
--- a/gcc/testsuite/gcc.target/mips/madd-8.c
+++ b/gcc/testsuite/gcc.target/mips/madd-8.c
@@ -11,6 +11,6 @@ f2 (int x, int y, int z)
   asm volatile ("" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9",
                "$10", "$11", "$12", "$13", "$14", "$15", "$16", "$17",
                "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25",
-               "$31");
+               "$31", "lo");
   return x * y + z;
 }

diff --git a/gcc/testsuite/gcc.target/mips/msub-8.c b/gcc/testsuite/gcc.target/mips/msub-8.c
index a66307f10412a4822564ae0f56156dbbe44f7d6b..b0f1523cf31387f2c059012d1b95f891f4736e39 100644 (file)
--- a/gcc/testsuite/gcc.target/mips/msub-8.c
+++ b/gcc/testsuite/gcc.target/mips/msub-8.c
@@ -11,6 +11,6 @@ f2 (int x, int y, int z)
   asm volatile ("" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9",
                "$10", "$11", "$12", "$13", "$14", "$15", "$16", "$17",
                "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25",
-               "$31");
+               "$31", "lo");
   return x - y * z;
 }