i965/gen6: Remove check for stencil format
authorTopi Pohjolainen <topi.pohjolainen@intel.com>
Thu, 29 Dec 2016 08:06:16 +0000 (10:06 +0200)
committerTopi Pohjolainen <topi.pohjolainen@intel.com>
Fri, 27 Jan 2017 06:57:26 +0000 (08:57 +0200)
There are is no alternative.

Reviewed-by: Samuel Iglesias Gons\341lvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
src/mesa/drivers/dri/i965/gen6_depth_state.c

index 3f14006f8a6b531960016421954a38b194a515a8..cb0ed253f9ca297ab65d3cf10167cc2af31d77c3 100644 (file)
@@ -191,20 +191,14 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
          uint32_t offset = 0;
 
          if (stencil_mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
-            if (stencil_mt->format == MESA_FORMAT_S_UINT8) {
-               /* Note: we can't compute the stencil offset using
-                * intel_region_get_aligned_offset(), because stencil_region
-                * claims that the region is untiled even though it's W tiled.
-                */
-               offset =
-                  stencil_mt->level[lod].level_y * stencil_mt->pitch +
-                  stencil_mt->level[lod].level_x * 64;
-            } else {
-               offset = intel_miptree_get_aligned_offset(
-                           stencil_mt,
-                           stencil_mt->level[lod].level_x,
-                           stencil_mt->level[lod].level_y);
-            }
+            assert(stencil_mt->format == MESA_FORMAT_S_UINT8);
+
+            /* Note: we can't compute the stencil offset using
+             * intel_region_get_aligned_offset(), because stencil_region
+             * claims that the region is untiled even though it's W tiled.
+             */
+            offset = stencil_mt->level[lod].level_y * stencil_mt->pitch +
+                     stencil_mt->level[lod].level_x * 64;
          }
 
         BEGIN_BATCH(3);