;; part.
(define_expand "fixuns_truncdfsi2"
- [(parallel [(set (match_dup 3)
- (fix:DI
- (fix:DF (match_operand:DF 1 "register_operand" ""))))
+ [(set (match_dup 5)
+ (match_operand:DF 1 "register_operand" ""))
+ (parallel [(set (match_dup 3)
+ (fix:DI (fix:DF (match_dup 5))))
(clobber (match_scratch:HI 2 ""))
- (clobber (match_dup 1))])
+ (clobber (match_dup 5))])
(set (match_operand:SI 0 "general_operand" "")
(match_dup 4))]
"TARGET_80387"
{
operands[3] = gen_reg_rtx (DImode);
operands[4] = gen_lowpart (SImode, operands[3]);
+ operands[5] = gen_reg_rtx (DFmode);
}")
(define_expand "fixuns_truncsfsi2"
- [(parallel [(set (match_dup 3)
- (fix:DI
- (fix:SF (match_operand:SF 1 "register_operand" ""))))
+ [(set (match_dup 5)
+ (match_operand:SF 1 "register_operand" ""))
+ (parallel [(set (match_dup 3)
+ (fix:DI (fix:SF (match_dup 5))))
(clobber (match_scratch:HI 2 ""))
- (clobber (match_dup 1))])
+ (clobber (match_dup 5))])
(set (match_operand:SI 0 "general_operand" "")
(match_dup 4))]
"TARGET_80387"
{
operands[3] = gen_reg_rtx (DImode);
operands[4] = gen_lowpart (SImode, operands[3]);
+ operands[5] = gen_reg_rtx (SFmode);
}")
;; Signed conversion to DImode.
(define_expand "fix_truncdfdi2"
- [(parallel [(set (match_operand:DI 0 "general_operand" "")
- (fix:DI
- (fix:DF (match_operand:DF 1 "register_operand" ""))))
+ [(set (match_dup 3)
+ (match_operand:DF 1 "register_operand" ""))
+ (parallel [(set (match_operand:DI 0 "general_operand" "")
+ (fix:DI (fix:DF (match_dup 3))))
(clobber (match_scratch:HI 2 ""))
- (clobber (match_dup 1))])]
+ (clobber (match_dup 3))])]
"TARGET_80387"
"
{
operands[1] = copy_to_mode_reg (DFmode, operands[1]);
+ operands[3] = gen_reg_rtx (DFmode);
}")
(define_expand "fix_truncsfdi2"
- [(parallel [(set (match_operand:DI 0 "general_operand" "")
- (fix:DI
- (fix:SF (match_operand:SF 1 "register_operand" ""))))
+ [(set (match_dup 3)
+ (match_operand:SF 1 "register_operand" ""))
+ (parallel [(set (match_operand:DI 0 "general_operand" "")
+ (fix:DI (fix:SF (match_dup 3))))
(clobber (match_scratch:HI 2 ""))
- (clobber (match_dup 1))])]
+ (clobber (match_dup 3))])]
"TARGET_80387"
"
{
operands[1] = copy_to_mode_reg (SFmode, operands[1]);
+ operands[3] = gen_reg_rtx (SFmode);
}")
;; These match a signed conversion of either DFmode or SFmode to DImode.