i965: Add untested passthrough GS setup.

diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile
index d21c921db34a439e3a445140d2a23e3cc5c1c349..fb7ee096d92b5371856a53bca5ca96a0faab19fc 100644 (file)
--- a/src/mesa/drivers/dri/i965/Makefile
+++ b/src/mesa/drivers/dri/i965/Makefile
@@ -87,6 +87,7 @@ DRIVER_SOURCES = \
        brw_wm_surface_state.c \
        gen6_cc.c \
        gen6_depthstencil.c \
+       gen6_gs_state.c \
        gen6_vs_state.c
 
 C_SOURCES = \

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 7a7bcc4e797e836805c041c856a1296a1850112b..7ba1c77ebe3b847a6b35b826ddfa5be2d84edc55 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -813,11 +813,13 @@
 #define CMD_3D_CC_STATE_POINTERS      0x780e /* GEN6+ */
 
 #define CMD_3D_VS_STATE                      0x7810 /* GEN6+ */
+/* DW2 */
 # define GEN6_VS_SPF_MODE                              (1 << 31)
 # define GEN6_VS_VECTOR_MASK_ENABLE                    (1 << 30)
 # define GEN6_VS_SAMPLER_COUNT_SHIFT                   27
 # define GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT       18
 # define GEN6_VS_DISPATCH_START_GRF_SHIFT              20
+/* DW4 */
 # define GEN6_VS_URB_READ_LENGTH_SHIFT                 11
 # define GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT           0
 # define GEN6_VS_MAX_THREADS_SHIFT                     25
@@ -825,11 +827,30 @@
 # define GEN6_VS_CACHE_DISABLE                         (1 << 1)
 # define GEN6_VS_ENABLE                                        (1 << 0)
 
+#define CMD_3D_GS_STATE                      0x7811 /* GEN6+ */
+/* DW2 */
+# define GEN6_GS_SPF_MODE                              (1 << 31)
+# define GEN6_GS_VECTOR_MASK_ENABLE                    (1 << 30)
+# define GEN6_GS_SAMPLER_COUNT_SHIFT                   27
+# define GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT       18
+# define GEN6_GS_DISPATCH_START_GRF_SHIFT              20
+/* DW4 */
+# define GEN6_GS_URB_READ_LENGTH_SHIFT                 11
+# define GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT           0
+/* DW5 */
+# define GEN6_GS_MAX_THREADS_SHIFT                     25
+# define GEN6_GS_STATISTICS_ENABLE                     (1 << 10)
+# define GEN6_GS_SO_STATISTICS_ENABLE                  (1 << 9)
+# define GEN6_GS_RENDERING_ENABLE                      (1 << 8)
+/* DW6 */
+# define GEN6_GS_ENABLE                                        (1 << 15)
+
 #define CMD_3D_CONSTANT_VS_STATE             0x7815 /* GEN6+ */
-# define GEN6_VS_BUFFER_3_ENABLE                       (1 << 15)
-# define GEN6_VS_BUFFER_2_ENABLE                       (1 << 14)
-# define GEN6_VS_BUFFER_1_ENABLE                       (1 << 13)
-# define GEN6_VS_BUFFER_0_ENABLE                       (1 << 12)
+#define CMD_3D_CONSTANT_GS_STATE             0x7816 /* GEN6+ */
+# define GEN6_CONSTANT_BUFFER_3_ENABLE                 (1 << 15)
+# define GEN6_CONSTANT_BUFFER_2_ENABLE                 (1 << 14)
+# define GEN6_CONSTANT_BUFFER_1_ENABLE                 (1 << 13)
+# define GEN6_CONSTANT_BUFFER_0_ENABLE                 (1 << 12)
 
 #define CMD_DRAW_RECT                 0x7900
 #define CMD_BLEND_CONSTANT_COLOR      0x7901

diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 5066fe151bbd3cf0559458a06a4e8113caf8acbe..c4d1f2556c9c0eb60ce99345f0fd79201d0a9fce 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -95,6 +95,7 @@ const struct brw_tracked_state gen6_blend_state;
 const struct brw_tracked_state gen6_cc_state_pointers;
 const struct brw_tracked_state gen6_color_calc_state;
 const struct brw_tracked_state gen6_depth_stencil_state;
+const struct brw_tracked_state gen6_gs_state;
 const struct brw_tracked_state gen6_vs_state;
 
 /**

diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index b4b086dec478afe4547bd92f8fcad390ce97f4f3..dd797c42dd7a982ec48cf905556b1509d7be135f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -134,6 +134,7 @@ const struct brw_tracked_state *gen6_atoms[] =
    &brw_wm_surfaces,           /* must do before samplers and unit */
 
    &gen6_vs_state,
+   &gen6_gs_state,
 #if 0
    &brw_wm_samplers,
 
@@ -141,7 +142,6 @@ const struct brw_tracked_state *gen6_atoms[] =
    &brw_sf_vp,
    &brw_sf_unit,
    &brw_clip_unit,
-   &brw_gs_unit,
 
    /* Command packets:
     */

diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c b/src/mesa/drivers/dri/i965/gen6_gs_state.c
new file mode 100644 (file)
index 0000000..3a16bd3
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen6_gs_state.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright © 2009 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Eric Anholt <eric@anholt.net>
+ *
+ */
+
+#include "brw_context.h"
+#include "brw_state.h"
+#include "brw_defines.h"
+#include "brw_util.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "intel_batchbuffer.h"
+
+static void
+upload_gs_state(struct brw_context *brw)
+{
+   struct intel_context *intel = &brw->intel;
+
+   BEGIN_BATCH(6);
+   OUT_BATCH(CMD_3D_GS_STATE << 16 | (6 - 2));
+   OUT_BATCH(0); /* prog_bo */
+   /* OUT_RELOC(brw->gs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); */
+   OUT_BATCH((0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
+            (0 << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
+   OUT_BATCH(0); /* scratch space base offset */
+   OUT_BATCH((1 << GEN6_GS_DISPATCH_START_GRF_SHIFT) |
+            (brw->gs.prog_data->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT) |
+            (0 << GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT));
+   OUT_BATCH((0 << GEN6_GS_MAX_THREADS_SHIFT) |
+            GEN6_GS_STATISTICS_ENABLE);
+   ADVANCE_BATCH();
+
+   /* Disable all the constant buffers. */
+   BEGIN_BATCH(5);
+   OUT_BATCH(CMD_3D_CONSTANT_GS_STATE << 16 | (5 - 2));
+   OUT_BATCH(0);
+   OUT_BATCH(0);
+   OUT_BATCH(0);
+   OUT_BATCH(0);
+   ADVANCE_BATCH();
+}
+
+const struct brw_tracked_state gen6_gs_state = {
+   .dirty = {
+      .mesa  = _NEW_TRANSFORM,
+      .brw   = (BRW_NEW_CURBE_OFFSETS |
+               BRW_NEW_URB_FENCE |
+               BRW_NEW_CONTEXT),
+      .cache = CACHE_NEW_GS_PROG
+   },
+   .emit = upload_gs_state,
+};