* config/aarch64/arm_neon.h (vsqrt_f64): New intrinsic.
* gcc.target/aarch64/simd/vsqrt_f64_1.c
From-SVN: r217936
+2014-11-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/arm_neon.h (vsqrt_f64): New intrinsic.
+
2014-11-21 Ilya Tocar <ilya.tocar@intel.com>
* common/config/i386/i386-common.c (OPTION_MASK_ISA_PCOMMIT_UNSET,
return __builtin_aarch64_sqrtv4sf (a);
}
+__extension__ static __inline float64x1_t __attribute__ ((__always_inline__))
+vsqrt_f64 (float64x1_t a)
+{
+ return (float64x1_t) { __builtin_sqrt (a[0]) };
+}
+
__extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
vsqrtq_f64 (float64x2_t a)
{
+2014-11-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * gcc.target/aarch64/simd/vsqrt_f64_1.c
+
2014-11-21 Ilya Tocar <ilya.tocar@intel.com>
* g++.dg/other/i386-2.C: Add -mpcommit.
--- /dev/null
+/* Test the vsqrt_f64 AArch64 SIMD intrinsic. */
+
+/* { dg-do run } */
+/* { dg-options "-save-temps -O3" } */
+
+#include "arm_neon.h"
+
+extern void abort (void);
+
+
+int
+main (void)
+{
+ float64x1_t in = vcreate_f64(0x3febd3e560634d7bULL);
+ float64x1_t result = vsqrt_f64 (in);
+ float64_t expected = 0.9325321502142351;
+
+ if (result[0] != expected)
+ abort ();
+
+ return 0;
+}
+
+/* { dg-final { scan-assembler "fsqrt\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\n" } } */
+/* { dg-final { cleanup-saved-temps } } */