[AArch64] Implement vsqrt_f64 intrinsic
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Fri, 21 Nov 2014 16:28:29 +0000 (16:28 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Fri, 21 Nov 2014 16:28:29 +0000 (16:28 +0000)
* config/aarch64/arm_neon.h (vsqrt_f64): New intrinsic.

* gcc.target/aarch64/simd/vsqrt_f64_1.c

From-SVN: r217936

gcc/ChangeLog
gcc/config/aarch64/arm_neon.h
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/aarch64/simd/vsqrt_f64_1.c [new file with mode: 0644]

index 97510ec465fbb005b42609a96537b91cc93955be..c3ef16bce9cd389d290819b0d614d8b8be0795d2 100644 (file)
@@ -1,3 +1,7 @@
+2014-11-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/aarch64/arm_neon.h (vsqrt_f64): New intrinsic.
+
 2014-11-21  Ilya Tocar  <ilya.tocar@intel.com>
 
        * common/config/i386/i386-common.c (OPTION_MASK_ISA_PCOMMIT_UNSET,
index 921a5db1c14dd176d026fcd156f338cf464d0cd3..8cff7195a106c4f7c26f74f3bd17c977058faf4a 100644 (file)
@@ -22512,6 +22512,12 @@ vsqrtq_f32 (float32x4_t a)
   return __builtin_aarch64_sqrtv4sf (a);
 }
 
+__extension__ static __inline float64x1_t __attribute__ ((__always_inline__))
+vsqrt_f64 (float64x1_t a)
+{
+  return (float64x1_t) { __builtin_sqrt (a[0]) };
+}
+
 __extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
 vsqrtq_f64 (float64x2_t a)
 {
index 0ab7fa03c32917796043976ea94d3a00faab1b65..17f711076081f199975991568075874d5d78391f 100644 (file)
@@ -1,3 +1,7 @@
+2014-11-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * gcc.target/aarch64/simd/vsqrt_f64_1.c
+
 2014-11-21  Ilya Tocar  <ilya.tocar@intel.com>
 
        * g++.dg/other/i386-2.C: Add -mpcommit.
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vsqrt_f64_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vsqrt_f64_1.c
new file mode 100644 (file)
index 0000000..57fb6bb
--- /dev/null
@@ -0,0 +1,25 @@
+/* Test the vsqrt_f64 AArch64 SIMD intrinsic.  */
+
+/* { dg-do run } */
+/* { dg-options "-save-temps -O3" } */
+
+#include "arm_neon.h"
+
+extern void abort (void);
+
+
+int
+main (void)
+{
+  float64x1_t in = vcreate_f64(0x3febd3e560634d7bULL);
+  float64x1_t result = vsqrt_f64 (in);
+  float64_t expected = 0.9325321502142351;
+
+  if (result[0] != expected)
+    abort ();
+
+  return 0;
+}
+
+/* { dg-final { scan-assembler "fsqrt\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\n" } } */
+/* { dg-final { cleanup-saved-temps } } */