bfin_si_revision, bfin_workarounds): Move these ...
* config/bfin/bfin.h: ... here.
+ From Mike Frysinger <michael.frysinger@analog.com>
+ * config/bfin/bfin-protos.h (bfin_cpu_type): Add BFIN_CPU_BF542M,
+ BFIN_CPU_BF544M, BFIN_CPU_BF547M, BFIN_CPU_BF548M, and BFIN_CPU_BF549M.
+ * config/bfin/bfin.c (bfin_cpus[]): Add 0.3 for bf542m, bf544m, bf547m,
+ bf548m, and bf549m.
+ * config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define __ADSPBF542M__
+ for BFIN_CPU_BF542M, __ADSPBF544M__ for BFIN_CPU_BF544M, __ADSPBF547M__
+ for BFIN_CPU_BF547M, __ADSPBF548M__ for BFIN_CPU_BF548M, and
+ __ADSPBF549M__ for BFIN_CPU_BF549M.
+ * config/bfin/t-bfin-elf (MULTILIB_MATCHES): Select bf532-none for
+ bf542m-none, bf544m-none, bf547m-none, bf548m-none, and bf549m-none.
+ * config/bfin/t-bfin-linux (MULTILIB_MATCHES): Likewise.
+ * config/bfin/t-bfin-uclinux (MULTILIB_MATCHES): Likewise.
+ * doc/invoke.texi (Blackfin Options): Document that -mcpu now accepts
+ bf542m, bf544m, bf547m, bf548m, and bf549m.
+
2009-09-07 Martin Jambor <mjambor@suse.cz>
PR middle-end/41282
WA_SPECULATIVE_LOADS | WA_RETS
| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS},
+ {"bf542m", BFIN_CPU_BF542M, 0x0003,
+ WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
+
{"bf542", BFIN_CPU_BF542, 0x0002,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
{"bf542", BFIN_CPU_BF542, 0x0001,
{"bf542", BFIN_CPU_BF542, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_LOAD_LCREGS},
+ {"bf544m", BFIN_CPU_BF544M, 0x0003,
+ WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
+
{"bf544", BFIN_CPU_BF544, 0x0002,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
{"bf544", BFIN_CPU_BF544, 0x0001,
{"bf544", BFIN_CPU_BF544, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_LOAD_LCREGS},
+ {"bf547m", BFIN_CPU_BF547M, 0x0003,
+ WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
+
{"bf547", BFIN_CPU_BF547, 0x0002,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
{"bf547", BFIN_CPU_BF547, 0x0001,
{"bf547", BFIN_CPU_BF547, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_LOAD_LCREGS},
+ {"bf548m", BFIN_CPU_BF548M, 0x0003,
+ WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
+
{"bf548", BFIN_CPU_BF548, 0x0002,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
{"bf548", BFIN_CPU_BF548, 0x0001,
{"bf548", BFIN_CPU_BF548, 0x0000,
WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_LOAD_LCREGS},
+ {"bf549m", BFIN_CPU_BF549M, 0x0003,
+ WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
+
{"bf549", BFIN_CPU_BF549, 0x0002,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
{"bf549", BFIN_CPU_BF549, 0x0001,
BFIN_CPU_BF538,
BFIN_CPU_BF539,
BFIN_CPU_BF542,
+ BFIN_CPU_BF542M,
BFIN_CPU_BF544,
+ BFIN_CPU_BF544M,
BFIN_CPU_BF547,
+ BFIN_CPU_BF547M,
BFIN_CPU_BF548,
+ BFIN_CPU_BF548M,
BFIN_CPU_BF549,
+ BFIN_CPU_BF549M,
BFIN_CPU_BF561
} bfin_cpu_t;
case BFIN_CPU_BF539: \
builtin_define ("__ADSPBF539__"); \
break; \
+ case BFIN_CPU_BF542M: \
+ builtin_define ("__ADSPBF542M__"); \
case BFIN_CPU_BF542: \
builtin_define ("__ADSPBF542__"); \
builtin_define ("__ADSPBF54x__"); \
break; \
+ case BFIN_CPU_BF544M: \
+ builtin_define ("__ADSPBF544M__"); \
case BFIN_CPU_BF544: \
builtin_define ("__ADSPBF544__"); \
builtin_define ("__ADSPBF54x__"); \
break; \
- case BFIN_CPU_BF548: \
- builtin_define ("__ADSPBF548__"); \
- builtin_define ("__ADSPBF54x__"); \
- break; \
+ case BFIN_CPU_BF547M: \
+ builtin_define ("__ADSPBF547M__"); \
case BFIN_CPU_BF547: \
builtin_define ("__ADSPBF547__"); \
builtin_define ("__ADSPBF54x__"); \
break; \
+ case BFIN_CPU_BF548M: \
+ builtin_define ("__ADSPBF548M__"); \
+ case BFIN_CPU_BF548: \
+ builtin_define ("__ADSPBF548__"); \
+ builtin_define ("__ADSPBF54x__"); \
+ break; \
+ case BFIN_CPU_BF549M: \
+ builtin_define ("__ADSPBF549M__"); \
case BFIN_CPU_BF549: \
builtin_define ("__ADSPBF549__"); \
builtin_define ("__ADSPBF54x__"); \
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf534-none mcpu?bf532-none=mcpu?bf536-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf537-none mcpu?bf532-none=mcpu?bf538-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf539-none mcpu?bf532-none=mcpu?bf542-none
-MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf544-none mcpu?bf532-none=mcpu?bf547-none
-MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548-none mcpu?bf532-none=mcpu?bf549-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf542m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf544-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf544m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf547-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf547m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549m-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf561-none
MULTILIB_EXCEPTIONS=mleaf-id-shared-library*
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf534-none mcpu?bf532-none=mcpu?bf536-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf537-none mcpu?bf532-none=mcpu?bf538-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf539-none mcpu?bf532-none=mcpu?bf542-none
-MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf544-none mcpu?bf532-none=mcpu?bf547-none
-MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548-none mcpu?bf532-none=mcpu?bf549-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf542m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf544-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf544m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf547-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf547m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549m-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf561-none
SHLIB_MAPFILES=$(srcdir)/config/bfin/libgcc-bfin.ver
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf534-none mcpu?bf532-none=mcpu?bf536-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf537-none mcpu?bf532-none=mcpu?bf538-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf539-none mcpu?bf532-none=mcpu?bf542-none
-MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf544-none mcpu?bf532-none=mcpu?bf547-none
-MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548-none mcpu?bf532-none=mcpu?bf549-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf542m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf544-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf544m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf547-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf547m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548m-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549m-none
MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf561-none
MULTILIB_EXCEPTIONS=mleaf-id-shared-library*
@samp{bf527}, @samp{bf531}, @samp{bf532}, @samp{bf533},
@samp{bf534}, @samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539},
@samp{bf542}, @samp{bf544}, @samp{bf547}, @samp{bf548}, @samp{bf549},
+@samp{bf542m}, @samp{bf544m}, @samp{bf547m}, @samp{bf548m}, @samp{bf549m},
@samp{bf561}.
The optional @var{sirevision} specifies the silicon revision of the target
Blackfin processor. Any workarounds available for the targeted silicon revision
+2009-09-07 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ From Mike Frysinger <michael.frysinger@analog.com>
+ * gcc.target/bfin/mcpu-bf542m.c: New file.
+ * gcc.target/bfin/mcpu-bf544m.c: Likewise.
+ * gcc.target/bfin/mcpu-bf546m.c: Likewise.
+ * gcc.target/bfin/mcpu-bf548m.c: Likewise.
+ * gcc.target/bfin/mcpu-bf549m.c: Likewise.
+
2009-09-07 Martin Jambor <mjambor@suse.cz>
PR middle-end/41282
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf542m" } */
+
+#ifndef __ADSPBF542__
+#error "__ADSPBF542__ is not defined"
+#endif
+
+#ifndef __ADSPBF542M__
+#error "__ADSPBF542M__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf544m" } */
+
+#ifndef __ADSPBF544__
+#error "__ADSPBF544__ is not defined"
+#endif
+
+#ifndef __ADSPBF544M__
+#error "__ADSPBF544M__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf547m" } */
+
+#ifndef __ADSPBF547__
+#error "__ADSPBF547__ is not defined"
+#endif
+
+#ifndef __ADSPBF547M__
+#error "__ADSPBF547M__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf548m" } */
+
+#ifndef __ADSPBF548__
+#error "__ADSPBF548__ is not defined"
+#endif
+
+#ifndef __ADSPBF548M__
+#error "__ADSPBF548M__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf549m" } */
+
+#ifndef __ADSPBF549__
+#error "__ADSPBF549__ is not defined"
+#endif
+
+#ifndef __ADSPBF549M__
+#error "__ADSPBF549M__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif