+2017-03-06 Julia Koval <julia.koval@intel.com>
+
+ PR target/79793
+ * config/i386/i386.c (ix86_minimum_incoming_stack_boundary): Set
+ incoming stack boundary to 128 for 64-bit targets.
+
2017-03-06 Richard Biener <rguenther@suse.de>
PR tree-optimization/79894
{
unsigned int incoming_stack_boundary;
- /* Stack of interrupt handler is always aligned to MIN_STACK_BOUNDARY.
- */
+ /* Stack of interrupt handler is aligned to 128 bits in 64bit
+ mode. */
if (cfun->machine->func_type != TYPE_NORMAL)
- incoming_stack_boundary = MIN_STACK_BOUNDARY;
+ incoming_stack_boundary = TARGET_64BIT ? 128 : MIN_STACK_BOUNDARY;
/* Prefer the one specified at command line. */
else if (ix86_user_incoming_stack_boundary)
incoming_stack_boundary = ix86_user_incoming_stack_boundary;
+2017-03-06 Julia Koval <julia.koval@intel.com>
+
+ PR target/79793
+ * gcc.target/i386/interrupt-12.c: Update scan-assembler-times
+ directives.
+ * gcc.target/i386/interrupt-13.c: Ditto.
+ * gcc.target/i386/interrupt-14.c: Ditto.
+ * gcc.target/i386/interrupt-15.c: Ditto.
+
2017-03-06 Jakub Jelinek <jakub@redhat.com>
PR c++/79822
/* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */
/* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%rax" { target { { ! ia32 } && nonpic } } } } */
/* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%r\[0-9\]+" { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times "push(?:l|q)\[\\t \]*%(?:r|e)bp" 1 } } */
-/* { dg-final { scan-assembler-times "leave" 1 { target nonpic } } } */
+/* { dg-final { scan-assembler-times "pushl\[\\t \]*%ebp" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "leave" 1 { target { ia32 && nonpic } } } } */
/* { dg-final { scan-assembler-times "pushl\[\\t \]*%eax" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-times "pushq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times "movq\[\\t \]*-8\\(%(?:r|e)bp\\),\[\\t \]*%rdi" 1 { target { { ! ia32 } && nonpic } } } } */
+/* { dg-final { scan-assembler-times "popq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */
/* { dg-final { scan-assembler "(addl|leal).*4.*%esp" { target ia32 } } } */
/* { dg-final { scan-assembler "(add|lea)(?:l|q)\[\\t \]*\\\$?8.*,\[\\t \]*%\[re\]?sp" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "iret" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */
/* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%rax" { target { { ! ia32 } && nonpic } } } } */
/* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%r\[0-9\]+" { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times "push(?:l|q)\[\\t \]*%(?:r|e)bp" 1 } } */
-/* { dg-final { scan-assembler-times "leave" 1 { target nonpic } } } */
+/* { dg-final { scan-assembler-times "pushl\[\\t \]*%ebp" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "leave" 1 { target { ia32 && nonpic } } } } */
/* { dg-final { scan-assembler-times "pushl\[\\t \]*%eax" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-times "pushq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times "movq\[\\t \]*-8\\(%(?:r|e)bp\\),\[\\t \]*%rdi" 1 { target { { ! ia32 } && nonpic } } } } */
+/* { dg-final { scan-assembler-times "popq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */
/* { dg-final { scan-assembler "(addl|leal).*4.*%esp" { target ia32 } } } */
/* { dg-final { scan-assembler "(add|lea)(?:l|q)\[\\t \]*\\\$?8.*,\[\\t \]*%\[re\]?sp" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "iret" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)si" } } */
/* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%r\[8-9\]+" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%r1\[0-5\]+" { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times "push(?:l|q)\[\\t \]*%(?:r|e)bp" 2 } } */
+/* { dg-final { scan-assembler-times "pushl\[\\t \]*%ebp" 2 { target ia32 } } } */
/* { dg-final { scan-assembler-times "leave" 2 { target ia32 } } } */
/* { dg-final { scan-assembler-times "pushq\[\\t \]*%rdi" 2 { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times "movq\[\\t \]*-8\\(%(?:r|e)bp\\),\[\\t \]*%rdi" 2 { target { { ! ia32 } && nonpic } } } } */
+/* { dg-final { scan-assembler-times "popq\[\\t \]*%rdi" 2 { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "iret" 2 { target ia32 } } } */
/* { dg-final { scan-assembler-times "iretq" 2 { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "\tcld" 2 } } */
/* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */
/* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%rax" { target { { ! ia32 } && nonpic } } } } */
/* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%r\[0-9\]+" { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times "push(?:l|q)\[\\t \]*%(?:r|e)bp" 2 } } */
-/* { dg-final { scan-assembler-times "leave" 2 { target nonpic } } } */
+/* { dg-final { scan-assembler-times "pushl\[\\t \]*%ebp" 2 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "leave" 2 { target { ia32 && nonpic } } } } */
/* { dg-final { scan-assembler-times "pushl\[\\t \]*%eax" 2 { target ia32 } } } */
/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 2 { target ia32 } } } */
/* { dg-final { scan-assembler-times "pushq\[\\t \]*%rdi" 2 { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times "movq\[\\t \]*-8\\(%(?:r|e)bp\\),\[\\t \]*%rdi" 2 { target { { ! ia32 } && nonpic } } } } */
+/* { dg-final { scan-assembler-times "popq\[\\t \]*%rdi" 2 { target { ! ia32 } } } } */
/* { dg-final { scan-assembler "(addl|leal).*4.*%esp" { target ia32 } } } */
/* { dg-final { scan-assembler "(add|lea)(?:l|q)\[\\t \]*\\\$?8.*,\[\\t \]*%\[re\]?sp" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "iret" 2 { target ia32 } } } */