Fix debug reset.

ndmreset now resets all harts (instead of just the current hart), and
hartreset resets the selected hart (instead of being ignored).

diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc
index 53df8a47d1a7415f20ac8ad88d11cb74b8b29022..8d73f07d0ab3585642b88f1ef56c764bebeb0347 100644 (file)
--- a/riscv/debug_module.cc
+++ b/riscv/debug_module.cc
@@ -459,10 +459,16 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value)
               debug_rom_flags[dmcontrol.hartsel] |= (1 << DEBUG_ROM_FLAG_RESUME);
               resumeack[dmcontrol.hartsel] = false;
             }
-           if (dmcontrol.ndmreset) {
+           if (dmcontrol.hartreset) {
              proc->reset();
            }
           }
+          if (dmcontrol.ndmreset) {
+            for (size_t i = 0; i < sim->nprocs(); i++) {
+              proc = sim->get_core(i);
+              proc->reset();
+            }
+          }
         }
         return true;