+2017-05-15 Nick Clifton <nickc@redhat.com>
+
+ PR gas/21458
+ * config/tc-arm.c (do_adr): If the ADR involves a thumb function
+ symbol, ensure that the T bit will be set.
+ (do_adrl): Likewise.
+ (do_t_adr): Likewise.
+ * testsuite/gas/arm/pr21458.s: New test.
+ * testsuite/gas/arm/pr21458.d: New test driver.
+
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
* testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as'
inst.reloc.type = BFD_RELOC_ARM_IMMEDIATE;
inst.reloc.pc_rel = 1;
inst.reloc.exp.X_add_number -= 8;
+
+ if (inst.reloc.exp.X_op == O_symbol
+ && inst.reloc.exp.X_add_symbol != NULL
+ && S_IS_DEFINED (inst.reloc.exp.X_add_symbol)
+ && THUMB_IS_FUNC (inst.reloc.exp.X_add_symbol))
+ inst.reloc.exp.X_add_number += 1;
}
/* This is a pseudo-op of the form "adrl rd, label" to be converted
inst.reloc.pc_rel = 1;
inst.size = INSN_SIZE * 2;
inst.reloc.exp.X_add_number -= 8;
+
+ if (inst.reloc.exp.X_op == O_symbol
+ && inst.reloc.exp.X_add_symbol != NULL
+ && S_IS_DEFINED (inst.reloc.exp.X_add_symbol)
+ && THUMB_IS_FUNC (inst.reloc.exp.X_add_symbol))
+ inst.reloc.exp.X_add_number += 1;
}
static void
inst.reloc.type = BFD_RELOC_ARM_THUMB_ADD;
inst.reloc.exp.X_add_number -= 4; /* PC relative adjust. */
inst.reloc.pc_rel = 1;
-
inst.instruction |= Rd << 4;
}
+
+ if (inst.reloc.exp.X_op == O_symbol
+ && inst.reloc.exp.X_add_symbol != NULL
+ && S_IS_DEFINED (inst.reloc.exp.X_add_symbol)
+ && THUMB_IS_FUNC (inst.reloc.exp.X_add_symbol))
+ inst.reloc.exp.X_add_number += 1;
}
/* Arithmetic instructions for which there is just one 16-bit
--- /dev/null
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: ADR(L) for Thumb functions
+#skip: *-*-pe *-wince-* *-*-coff *-*-vxworks
+
+# Test that using ADR(L) on thumb function symbols sets the T bit.
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+00000 <.*> 4770[ ]+bx[ ]+lr
+0+00002 <.*> 46c0[ ]+nop[ ]+; \(mov r8, r8\)
+0+00004 <.*> e12fff1e[ ]+bx[ ]+lr
+0+00008 <.*> f2af 000b[ ]+subw[ ]+r0, pc, #11
+0+0000c <.*> 4780[ ]+blx[ ]+r0
+0+0000e <.*> f2af 020c[ ]+subw[ ]+r2, pc, #12
+0+00012 <.*> 4790[ ]+blx[ ]+r2
+0+00014 <.*> e24f401b[ ]+sub[ ]+r4, pc, #27
+0+00018 <.*> e1a00000[ ]+nop[ ]+; \(mov r0, r0\)
+0+0001c <.*> e12fff34[ ]+blx[ ]+r4
+0+00020 <.*> e24f6024[ ]+sub[ ]+r6, pc, #36[ ]+; 0x24
+0+00024 <.*> e1a00000[ ]+nop[ ]+; \(mov r0, r0\)
+0+00028 <.*> e12fff36[ ]+blx[ ]+r6
+0+0002c <.*> e24f8033[ ]+sub[ ]+r8, pc, #51[ ]+; 0x33
+0+00030 <.*> e12fff38[ ]+blx[ ]+r8
+0+00034 <.*> e24fa038[ ]+sub[ ]+sl, pc, #56[ ]+; 0x38
+0+00038 <.*> e12fff3a[ ]+blx[ ]+sl
+0+0003c <.*> 324fc043[ ]+subcc[ ]+ip, pc, #67[ ]+; 0x43
--- /dev/null
+.syntax unified
+.thumb
+.text
+.align 2
+.global __thumbFn
+.type __testFn, %function
+.thumb_func
+__thumbFn:
+ bx lr
+ nop
+
+.arm
+.global __armFn
+.type __armFn, %function
+__armFn:
+ bx lr
+
+.thumb
+.global __test_thumb
+.type __test_thumb, %function
+.thumb_func
+__test_thumb:
+ ADR R0,__thumbFn
+ BLX R0
+ ADR R2,__armFn
+ BLX R2
+
+.arm
+.global __test_arm
+.type __test_arm, %function
+__test_arm:
+ ADRL R4,__thumbFn
+ BLX R4
+ ADRL R6,__armFn
+ BLX R6
+ ADR r8, __thumbFn
+ blx r8
+ ADR r10, __armFn
+ blx r10
+ adrlo r12, __thumbFn