verilog: Support tri/triand/trior wire types.

These are, by the standard, just aliases for wire/wand/wor.

Fixes #2918.

diff --git a/frontends/verilog/verilog_lexer.l b/frontends/verilog/verilog_lexer.l
index 54fb652403a602ce679ac4fd12821b28ea704041..0306f5494b3728482d4a69f5f4a8bc1a31c6ff2a 100644 (file)
--- a/frontends/verilog/verilog_lexer.l
+++ b/frontends/verilog/verilog_lexer.l
@@ -277,8 +277,11 @@ static bool isUserType(std::string &s)
 "output"  { return TOK_OUTPUT; }
 "inout"   { return TOK_INOUT; }
 "wire"    { return TOK_WIRE; }
+"tri"     { return TOK_WIRE; }
 "wor"     { return TOK_WOR; }
+"trior"   { return TOK_WOR; }
 "wand"    { return TOK_WAND; }
+"triand"  { return TOK_WAND; }
 "reg"     { return TOK_REG; }
 "integer" { return TOK_INTEGER; }
 "signed"  { return TOK_SIGNED; }