Parameters
----------
- i : Signal, in
+ i : Signal(n), in
Signal to be resynchronised.
- o : Signal, out
+ o : Signal(n), out
Signal connected to synchroniser output.
o_domain : str
Name of output clock domain.
Platform override
-----------------
- Define the ``get_ff_sync`` platform method to override the implementation of :class:`FFSynchronizer`,
- e.g. to instantiate library cells directly.
+ Define the ``get_ff_sync`` platform method to override the implementation of
+ :class:`FFSynchronizer`, e.g. to instantiate library cells directly.
Note on Reset
-------------
class ResetSynchronizer(Elaboratable):
+ """Synchronize deassertion of a clock domain reset.
+
+ The reset of the clock domain driven by the :class:`ResetSynchronizer` is asserted
+ asynchronously and deasserted synchronously, eliminating metastability during deassertion.
+
+ The driven clock domain could use a reset that is asserted either synchronously or
+ asynchronously; a reset is always deasserted synchronously. A domain with an asynchronously
+ asserted reset is useful if the clock of the domain may be gated, yet the domain still
+ needs to be reset promptly; otherwise, synchronously asserted reset (the default) should
+ be used.
+
+ Parameters
+ ----------
+ arst : Signal(1), out
+ Asynchronous reset signal, to be synchronized.
+ domain : str
+ Name of clock domain to reset.
+ stages : int, >=2
+ Number of synchronization stages between input and output. The lowest safe number is 2,
+ with higher numbers reducing MTBF further, at the cost of increased deassertion latency.
+
+ Platform override
+ -----------------
+ Define the ``get_reset_sync`` platform method to override the implementation of
+ :class:`ResetSynchronizer`, e.g. to instantiate library cells directly.
+ """
def __init__(self, arst, *, domain="sync", stages=2):
self.arst = arst