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Fixed bug in verilog parser
author
Clifford Wolf
<clifford@clifford.at>
Thu, 15 Oct 2015 13:19:23 +0000
(15:19 +0200)
committer
Clifford Wolf
<clifford@clifford.at>
Thu, 15 Oct 2015 13:19:23 +0000
(15:19 +0200)
frontends/verilog/verilog_parser.y
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diff --git
a/frontends/verilog/verilog_parser.y
b/frontends/verilog/verilog_parser.y
index e0446e082b42c2f55fddc542476a8479be76c48a..09748eba45b4f2abc3c9217ddbf58c7c220dd621 100644
(file)
--- a/
frontends/verilog/verilog_parser.y
+++ b/
frontends/verilog/verilog_parser.y
@@
-759,7
+759,7
@@
assign_expr_list:
assign_expr | assign_expr_list ',' assign_expr;
assign_expr:
-
expr
'=' expr {
+
lvalue
'=' expr {
ast_stack.back()->children.push_back(new AstNode(AST_ASSIGN, $1, $3));
};