rs6000-c (altivec_overloaded_builtins): Fix order of entries for ALTIVEC_BUILTIN_VEC_...
authorCarl Love <cel@us.ibm.com>
Wed, 25 Jan 2017 16:23:48 +0000 (16:23 +0000)
committerCarl Love <carll@gcc.gnu.org>
Wed, 25 Jan 2017 16:23:48 +0000 (16:23 +0000)
gcc/ChangeLog:

2017-01-25  Carl Love  <cel@us.ibm.com>

        * config/rs6000/rs6000-c (altivec_overloaded_builtins): Fix order
        of entries for ALTIVEC_BUILTIN_VEC_PACKS and P8V_BUILTIN_VEC_VGBBD.

gcc/testsuite/ChangeLog:

2017-01-25  Carl Love  <cel@us.ibm.com>
        * gcc.target/powerpc/builtins-3-p8.c:  Add missing tests for the
        vec_packs built-ins

From-SVN: r244904

gcc/ChangeLog
gcc/config/rs6000/rs6000-c.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c

index 233116a5a633af6ecb66cecb432bb60e8131de51..4712d7c40d93fb09a813e2c4a14c7b5c63da9421 100644 (file)
@@ -1,3 +1,8 @@
+2017-01-25  Carl Love  <cel@us.ibm.com>
+
+       * config/rs6000/rs6000-c (altivec_overloaded_builtins): Fix order
+       of entries for ALTIVEC_BUILTIN_VEC_PACKS and P8V_BUILTIN_VEC_VGBBD.
+
 2017-01-25  Jonathan Wakely  <jwakely@redhat.com>
 
        * doc/invoke.texi (C++ Dialect Options): Fix typo.
index fd6da7e77e0144186d9ac209d1c1e6fb80a604c7..ed4d8ff0eeb8aa6d1dfe36bb2f89189d09b74a42 100644 (file)
@@ -2154,14 +2154,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSWSS,
     RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKSWSS, ALTIVEC_BUILTIN_VPKSWSS,
-    RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKUDUS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKSDSS,
     RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
+  { ALTIVEC_BUILTIN_VEC_VPKSWSS, ALTIVEC_BUILTIN_VPKSWSS,
+    RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  { ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS,
+    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VPKSHSS, ALTIVEC_BUILTIN_VPKSHSS,
     RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_VPKUHUS, ALTIVEC_BUILTIN_VPKUHUS,
@@ -4789,6 +4789,10 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
   { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
+  { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
+    RS6000_BTI_V16QI, 0, 0, 0 },
+  { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
+    RS6000_BTI_unsigned_V16QI, 0, 0, 0 },
 
   { P9V_BUILTIN_VEC_VINSERT4B, P9V_BUILTIN_VINSERT4B,
     RS6000_BTI_V16QI, RS6000_BTI_V4SI,
@@ -5050,11 +5054,6 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW,
     RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },
 
-  { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
-    RS6000_BTI_V16QI, 0, 0, 0 },
-  { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
-    RS6000_BTI_unsigned_V16QI, 0, 0, 0 },
-
   { P9V_BUILTIN_VEC_VSLV, P9V_BUILTIN_VSLV,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
     RS6000_BTI_unsigned_V16QI, 0 },
index a5d3065864134653bfb403682dbae7a229faf25f..1fee6c813edad8a053e7da08ad43a7c49a6cc26d 100644 (file)
@@ -1,3 +1,7 @@
+2017-01-25  Carl Love  <cel@us.ibm.com>
+       * gcc.target/powerpc/builtins-3-p8.c:  Add missing tests for the
+       vec_packs built-ins
+
 2017-01-25  Christophe Lyon  <christophe.lyon@linaro.org>
 
        * gcc.target/arm/vseleqdf.c: Require arm_arch_v8a_ok, add
index d2964b4d838685214a107ba6f7310eb13b00d335..90e573d2654c587b9e9cc03d86bc0fb6080ee0b3 100644 (file)
@@ -22,14 +22,32 @@ test_nabs_long_long (vector long long x)
   return vec_nabs (x);
 }
 
+vector signed int
+test_vsi_packs_vsll_vsll (vector signed long long x,
+                          vector signed long long y)
+{
+  return vec_packs (x, y);
+}
+
+vector unsigned int
+test_vui_packs_vull_vull (vector unsigned long long x,
+                          vector unsigned long long y)
+{
+  return vec_packs (x, y);
+}
+
 /* Expected test results:
 
      test_eq_long_long          1 vcmpequd inst
      test_pack_float            1 vpkudum inst
-     test_nabs_long_long        1 vspltisw, 1 vsubudm, 1 vminsd */
+     test_nabs_long_long        1 vspltisw, 1 vsubudm, 1 vminsd
+     test_vsi_packs_vsll_vsll   1 vpksdss
+     test_vui_packs_vull_vull   1 vpkudus */
 
 /* { dg-final { scan-assembler-times "vcmpequd" 1 } } */
 /* { dg-final { scan-assembler-times "vpkudum"  1 } } */
 /* { dg-final { scan-assembler-times "vspltisw" 1 } } */
 /* { dg-final { scan-assembler-times "vsubudm"  1 } } */
 /* { dg-final { scan-assembler-times "vminsd"   1 } } */
+/* { dg-final { scan-assembler-times "vpksdss"  1 } } */
+/* { dg-final { scan-assembler-times "vpkudus"  1 } } */