Set Verific flag vhdl_support_variable_slice=1
authorClifford Wolf <clifford@clifford.at>
Fri, 9 Nov 2018 20:03:13 +0000 (21:03 +0100)
committerClifford Wolf <clifford@clifford.at>
Fri, 9 Nov 2018 20:03:23 +0000 (21:03 +0100)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
frontends/verific/verific.cc

index dba3b0f0c106ebc974a852fef103f5dd1fc6d11d..971f0b24a8514688a0b778c8f0ae1e59308bd9f5 100644 (file)
@@ -1835,6 +1835,7 @@ struct VerificPass : public Pass {
                        Message::RegisterCallBackMsg(msg_func);
                        RuntimeFlags::SetVar("db_preserve_user_nets", 1);
                        RuntimeFlags::SetVar("db_allow_external_nets", 1);
+                       RuntimeFlags::SetVar("vhdl_support_variable_slice", 1);
                        RuntimeFlags::SetVar("vhdl_ignore_assertion_statements", 0);
                        RuntimeFlags::SetVar("veri_extract_dualport_rams", 0);
                        RuntimeFlags::SetVar("veri_extract_multiport_rams", 1);