(no commit message)

diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn
index 5dc42d0b6e6232c2947201c432653bc2b2e22ad9..a796feee42b161ba387d9221ffc039c7a854eb1f 100644 (file)
--- a/openpower/sv/cr_int_predication.mdwn
+++ b/openpower/sv/cr_int_predication.mdwn
@@ -19,6 +19,10 @@ Purpose:
 * To provide a vectorised version of the same, suitable for advanced
   predication
 
+Side-effects:
+
+* mtcrweird when RA=0 is a means to set or clear arbitrary CR bits from immediates
+
 # Instruction form and pseudocode
 
     | 0-5 | 6-10 | 11 | 12-15 | 16-18 | 19-20 | 21-30 | 31 |
@@ -40,7 +44,7 @@ bit 11=0:
 
 bit 11=1:
 
-    mfcrweird: RA, BB, mask.mode
+    mtcrweird: RA, BB, mask.mode
 
     reg = (RA|0)
     n0 = mask[1] & (mode[0] == reg[0])
@@ -48,3 +52,8 @@ bit 11=1:
     n2 = mask[2] & (mode[2] == reg[0])
     n3 = mask[3] & (mode[3] == reg[0])
     CRfile[32+BB*4:36+BB*4] = n0 || n1 || n2 || b3
+
+Pseudo-op:
+
+    mtcri BB, mode    mtcrweird r0, BB, 0b1111.~mode
+