Re-enable &mfs for synth_{ecp5,xilinx}

diff --git a/techlibs/ecp5/synth_ecp5.cc b/techlibs/ecp5/synth_ecp5.cc
index d616391b22c210fae643dac82ca3e35bb5e60a53..6583f43fd26ee8a77c55c3966dc575058435d573 100644 (file)
--- a/techlibs/ecp5/synth_ecp5.cc
+++ b/techlibs/ecp5/synth_ecp5.cc
@@ -323,9 +323,9 @@ struct SynthEcp5Pass : public ScriptPass
                        if (abc9) {
                                run("read_verilog -icells -lib +/ecp5/abc9_model.v");
                                if (nowidelut)
-                                       run("abc9 -lut +/ecp5/abc9_5g_nowide.lut -box +/ecp5/abc9_5g.box -W 200 -nomfs");
+                                       run("abc9 -lut +/ecp5/abc9_5g_nowide.lut -box +/ecp5/abc9_5g.box -W 200");
                                else
-                                       run("abc9 -lut +/ecp5/abc9_5g.lut -box +/ecp5/abc9_5g.box -W 200 -nomfs");
+                                       run("abc9 -lut +/ecp5/abc9_5g.lut -box +/ecp5/abc9_5g.box -W 200");
                                run("techmap -map +/ecp5/abc9_unmap.v");
                        } else {
                                if (nowidelut)

diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index b0c4795eec655355f2153868eae63e75d04c4a01..e1748562e99aa5c5aa6d04f6613153062ad19d2a 100644 (file)
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -541,7 +541,6 @@ struct SynthXilinxPass : public ScriptPass
                                run("read_verilog -icells -lib +/xilinx/abc9_model.v");
                                std::string abc9_opts = " -box +/xilinx/abc9_xc7.box";
                                abc9_opts += stringf(" -W %d", XC7_WIRE_DELAY);
-                               abc9_opts += " -nomfs";
                                if (nowidelut)
                                        abc9_opts += " -lut +/xilinx/abc9_xc7_nowide.lut";
                                else