(no commit message)

diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn
index 11e9d58e465127bad9b628d984987bcd5332e32a..e9a670218a0c20a3702a21c8f39d77238c19463c 100644 (file)
--- a/openpower/sv/svp64/appendix.mdwn
+++ b/openpower/sv/svp64/appendix.mdwn
@@ -709,7 +709,7 @@ so FP instructions with Rc=1 write to CR1 (n=1).
 
 CRs are not stored in SPRs: they are registers in their own right.
 Therefore context-switching the full set of CRs involves a Vectorised
-mfcr or mtcr, using VL=64, elwidth=8 to do so.  This is exactly as how
+mfcr or mtcr, using VL=8 to do so.  This is exactly as how
 scalar OpenPOWER context-switches CRs: it is just that there are now
 more of them.