protected:
// Constructor.
SparcStaticInst(const char *mnem,
- MachInst _machInst, OpClass __opClass)
+ ExtMachInst _machInst, OpClass __opClass)
: StaticInst(mnem, _machInst, __opClass)
{
}
const uint32_t numMicroOps;
//Constructor.
- SparcMacroInst(const char *mnem, MachInst _machInst,
+ SparcMacroInst(const char *mnem, ExtMachInst _machInst,
OpClass __opClass, uint32_t _numMicroOps)
: SparcStaticInst(mnem, _machInst, __opClass),
numMicroOps(_numMicroOps)
protected:
//Constructor.
SparcMicroInst(const char *mnem,
- MachInst _machInst, OpClass __opClass)
+ ExtMachInst _machInst, OpClass __opClass)
: SparcStaticInst(mnem, _machInst, __opClass)
{
flags[IsMicroOp] = true;
protected:
//Constructor.
SparcDelayedMicroInst(const char *mnem,
- MachInst _machInst, OpClass __opClass)
+ ExtMachInst _machInst, OpClass __opClass)
: SparcMicroInst(mnem, _machInst, __opClass)
{
flags[IsDelayedCommit] = true;
#include "arch/sparc/isa_traits.hh"
#include "base/misc.hh"
+#include "base/bitfield.hh"
#include "cpu/thread_context.hh"
namespace SparcISA
if(inst & (1 << 13))
emi |= (static_cast<ExtMachInst>(xc->readMiscReg(MISCREG_ASI))
<< (sizeof(MachInst) * 8));
+ else
+ emi |= (static_cast<ExtMachInst>(bits(inst, 12, 5))
+ << (sizeof(MachInst) * 8));
return emi;
}