Filled in with basic x86 stuff. Some things are missing, wrong, or nonsensical for...
authorGabe Black <gblack@eecs.umich.edu>
Sat, 3 Mar 2007 17:19:52 +0000 (17:19 +0000)
committerGabe Black <gblack@eecs.umich.edu>
Sat, 3 Mar 2007 17:19:52 +0000 (17:19 +0000)
--HG--
extra : convert_revision : 2f7845db6d65b353985b474f7012cfbbaece6a39

src/arch/x86/types.hh

index 747d173e4b31efacff37906c1af0403e6ab2b31c..82fe0eb8a8d3d76cf5bfef76ff2ddba1759e3fe6 100644 (file)
 #ifndef __ARCH_X86_TYPES_HH__
 #define __ARCH_X86_TYPES_HH__
 
-#error X86 is not yet supported!
-
 namespace X86ISA
 {
+    //XXX This won't work
+    typedef uint32_t MachInst;
+    //XXX This won't work either
+    typedef uint64_t ExtMachInst;
+
+    typedef uint64_t IntReg;
+    typedef uint64_t MiscReg;
+
+    //These floating point types are correct for mmx, but not
+    //technically for x87 (80 bits) or at all for xmm (128 bits)
+    typedef double FloatReg;
+    typedef uint64_t FloatRegBits;
+    typedef union
+    {
+        IntReg intReg;
+        FloatReg fpReg;
+        MiscReg ctrlReg;
+    } AnyReg;
+
+    //XXX This is very hypothetical. X87 instructions would need to
+    //change their "context" constantly. It's also not clear how
+    //this would be handled as far as out of order execution.
+    //Maybe x87 instructions are in order?
+    enum RegContextParam
+    {
+        CONTEXT_X87_TOP
+    };
+
+    typedef int RegContextVal;
+
+    typedef uint8_t RegIndex;
 };
 
 #endif // __ARCH_X86_TYPES_HH__