arch,mem: Move page table construction into the arch classes.
authorGabe Black <gabeblack@google.com>
Sat, 23 Dec 2017 00:14:03 +0000 (16:14 -0800)
committerGabe Black <gabeblack@google.com>
Thu, 11 Jan 2018 06:29:58 +0000 (06:29 +0000)
This gets rid of an awkward NoArchPageTable class, and also gives the
arch a place to inject ISA specific parameters (specifically page size)
without having to have TheISA:: in the generic version of these types.

Change-Id: I1412f303460d5c43dafdb9b3cd07af81c908a441
Reviewed-on: https://gem5-review.googlesource.com/6981
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>

17 files changed:
src/arch/alpha/process.cc
src/arch/alpha/process.hh
src/arch/arm/process.cc
src/arch/arm/process.hh
src/arch/mips/process.cc
src/arch/mips/process.hh
src/arch/power/process.cc
src/arch/power/process.hh
src/arch/riscv/process.cc
src/arch/riscv/process.hh
src/arch/sparc/process.cc
src/arch/sparc/process.hh
src/arch/x86/process.cc
src/arch/x86/process.hh
src/mem/page_table.hh
src/sim/process.cc
src/sim/process.hh

index 58fe0bdbeee5972a57f3c7ee8d183995290662cb..3cc0b0daf891b3530fbf279d3b1972407ff6761e 100644 (file)
@@ -38,6 +38,7 @@
 #include "cpu/thread_context.hh"
 #include "debug/Loader.hh"
 #include "mem/page_table.hh"
+#include "params/Process.hh"
 #include "sim/aux_vector.hh"
 #include "sim/byteswap.hh"
 #include "sim/process_impl.hh"
@@ -48,8 +49,9 @@ using namespace AlphaISA;
 using namespace std;
 
 AlphaProcess::AlphaProcess(ProcessParams *params, ObjectFile *objFile)
-    : Process(params, objFile)
+    : Process(params, new FuncPageTable(params->name, params->pid), objFile)
 {
+    fatal_if(!params->useArchPT, "Arch page tables not implemented.");
     Addr brk_point = objFile->dataBase() + objFile->dataSize() +
                      objFile->bssSize();
     brk_point = roundUp(brk_point, PageBytes);
index a02b8cec465908e3820f07f466cc9f07ee5840eb..28ecd68198942926764520367bdee1a8c412d194 100644 (file)
@@ -61,7 +61,4 @@ class AlphaProcess : public Process
     virtual bool mmapGrowsDown() const override { return false; }
 };
 
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
 #endif // __ARCH_ALPHA_PROCESS_HH__
index dcc9145d3e09ae6ff05d525e8dc9f404f45e75fa..b64579a5df12efc3ab09e6ad9eb6843297d8bbe2 100644 (file)
@@ -51,6 +51,7 @@
 #include "cpu/thread_context.hh"
 #include "debug/Stack.hh"
 #include "mem/page_table.hh"
+#include "params/Process.hh"
 #include "sim/aux_vector.hh"
 #include "sim/byteswap.hh"
 #include "sim/process_impl.hh"
@@ -62,8 +63,10 @@ using namespace ArmISA;
 
 ArmProcess::ArmProcess(ProcessParams *params, ObjectFile *objFile,
                        ObjectFile::Arch _arch)
-    : Process(params, objFile), arch(_arch)
+    : Process(params, new FuncPageTable(params->name, params->pid), objFile),
+              arch(_arch)
 {
+    fatal_if(!params->useArchPT, "Arch page tables not implemented.");
 }
 
 ArmProcess32::ArmProcess32(ProcessParams *params, ObjectFile *objFile,
index f8e6542ff2094ef46721e3b0c5f1a67a441accfb..f4f0874c0051e7ea506e32f9ac97e0fa2301a7ed 100644 (file)
@@ -95,8 +95,5 @@ class ArmProcess64 : public ArmProcess
     void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
 };
 
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
 #endif // __ARM_PROCESS_HH__
 
index 4d0d5e309cdeba1c244dc2dcd3b7a857ea958780..f3b1108f46ad9bcb79a11307e6a72aed0bf40efb 100644 (file)
@@ -39,6 +39,7 @@
 #include "cpu/thread_context.hh"
 #include "debug/Loader.hh"
 #include "mem/page_table.hh"
+#include "params/Process.hh"
 #include "sim/aux_vector.hh"
 #include "sim/process.hh"
 #include "sim/process_impl.hh"
 using namespace std;
 using namespace MipsISA;
 
-MipsProcess::MipsProcess(ProcessParams * params, ObjectFile *objFile)
-    : Process(params, objFile)
+MipsProcess::MipsProcess(ProcessParams *params, ObjectFile *objFile)
+    : Process(params, new FuncPageTable(params->name, params->pid), objFile)
 {
+    fatal_if(!params->useArchPT, "Arch page tables not implemented.");
     // Set up stack. On MIPS, stack starts at the top of kuseg
     // user address space. MIPS stack grows down from here
     Addr stack_base = 0x7FFFFFFF;
index ed6561c1aeb12a1d28246c31f637bf683fbafb24..e9e058519af81741d06e56c48df3904b26045ec8 100644 (file)
@@ -58,8 +58,4 @@ class MipsProcess : public Process
     void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
 };
 
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
-
 #endif // __MIPS_PROCESS_HH__
index 4a34decf3f551e7c1f593a7e203894d37dabb264..87e5bac9ea484603e272774b2e52d398556595c9 100644 (file)
@@ -40,6 +40,7 @@
 #include "cpu/thread_context.hh"
 #include "debug/Stack.hh"
 #include "mem/page_table.hh"
+#include "params/Process.hh"
 #include "sim/aux_vector.hh"
 #include "sim/process_impl.hh"
 #include "sim/syscall_return.hh"
@@ -49,8 +50,9 @@ using namespace std;
 using namespace PowerISA;
 
 PowerProcess::PowerProcess(ProcessParams *params, ObjectFile *objFile)
-    : Process(params, objFile)
+    : Process(params, new FuncPageTable(params->name, params->pid), objFile)
 {
+    fatal_if(!params->useArchPT, "Arch page tables not implemented.");
     // Set up break point (Top of Heap)
     Addr brk_point = objFile->dataBase() + objFile->dataSize() +
                      objFile->bssSize();
index 08efdfeecff117251dcb67373d1dc06e40e3f9f0..348e3750f30805b4a4fd6dcc43cf4532d4fe442b 100644 (file)
@@ -57,8 +57,5 @@ class PowerProcess : public Process
     void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
 };
 
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
 #endif // __POWER_PROCESS_HH__
 
index b4fe1eefca2083f2d8b415c5e09dd814644ddca5..88a093a06e4e06c820deada37d8c60efed50c450 100644 (file)
 using namespace std;
 using namespace RiscvISA;
 
-RiscvProcess::RiscvProcess(ProcessParams * params,
-    ObjectFile *objFile) : Process(params, objFile)
+RiscvProcess::RiscvProcess(ProcessParams *params, ObjectFile *objFile) :
+        Process(params, new FuncPageTable(params->name, params->pid), objFile)
 {
+    fatal_if(!params->useArchPT, "Arch page tables not implemented.");
     const Addr stack_base = 0x7FFFFFFFFFFFFFFFL;
     const Addr max_stack_size = 8 * 1024 * 1024;
     const Addr next_thread_stack_base = stack_base - max_stack_size;
index 2a27f350eb945768491e9df67acf259d4ed10c7a..bda278ec40140c1ac641af2b982d6ff41c8234fb 100644 (file)
@@ -65,8 +65,4 @@ class RiscvProcess : public Process
     virtual bool mmapGrowsDown() const override { return false; }
 };
 
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
-
 #endif // __RISCV_PROCESS_HH__
index da7032f081116603535613f67fe49754ba6c9f2b..fe91589d001f2ee25995a2a6f76939caa8aaa662 100644 (file)
@@ -42,6 +42,7 @@
 #include "cpu/thread_context.hh"
 #include "debug/Stack.hh"
 #include "mem/page_table.hh"
+#include "params/Process.hh"
 #include "sim/aux_vector.hh"
 #include "sim/process_impl.hh"
 #include "sim/syscall_return.hh"
@@ -53,10 +54,12 @@ using namespace SparcISA;
 static const int FirstArgumentReg = 8;
 
 
-SparcProcess::SparcProcess(ProcessParams * params, ObjectFile *objFile,
+SparcProcess::SparcProcess(ProcessParams *params, ObjectFile *objFile,
                            Addr _StackBias)
-    : Process(params, objFile), StackBias(_StackBias)
+    : Process(params, new FuncPageTable(params->name, params->pid), objFile),
+              StackBias(_StackBias)
 {
+    fatal_if(!params->useArchPT, "Arch page tables not implemented.");
     // Initialize these to 0s
     fillStart = 0;
     spillStart = 0;
index 6a203a400d471264b04bbc757b330889d03277a1..d7e0967585bc06f687f672f438998d5056ee0cfa 100644 (file)
@@ -160,7 +160,4 @@ class Sparc64Process : public SparcProcess
     void setSyscallArg(ThreadContext *tc, int i, SparcISA::IntReg val);
 };
 
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
 #endif // __SPARC_PROCESS_HH__
index 1ad1315da4b7b8bc37c67a287b89ed7659256285..f11cc3438acb12b9cfe975ff6457d408a51846da 100644 (file)
@@ -60,6 +60,7 @@
 #include "debug/Stack.hh"
 #include "mem/multi_level_page_table.hh"
 #include "mem/page_table.hh"
+#include "params/Process.hh"
 #include "sim/aux_vector.hh"
 #include "sim/process_impl.hh"
 #include "sim/syscall_desc.hh"
@@ -95,10 +96,16 @@ static const int ArgumentReg32[] = {
 static const int NumArgumentRegs32 M5_VAR_USED =
     sizeof(ArgumentReg) / sizeof(const int);
 
-X86Process::X86Process(ProcessParams * params, ObjectFile *objFile,
+X86Process::X86Process(ProcessParams *params, ObjectFile *objFile,
                        SyscallDesc *_syscallDescs, int _numSyscallDescs)
-    : Process(params, objFile), syscallDescs(_syscallDescs),
-      numSyscallDescs(_numSyscallDescs)
+    : Process(params, params->useArchPT ?
+                      static_cast<PageTableBase *>(
+                              new ArchPageTable(params->name, params->pid,
+                                                params->system)) :
+                      static_cast<PageTableBase *>(
+                              new FuncPageTable(params->name, params->pid)),
+              objFile),
+      syscallDescs(_syscallDescs), numSyscallDescs(_numSyscallDescs)
 {
 }
 
index 3eb9620c9d33a24532235745cea126fc0c1eae97..e5e18570dd27dcfcf78478bd3146fd0ffc43c3ee 100644 (file)
@@ -59,6 +59,14 @@ namespace X86ISA
     class X86Process : public Process
     {
       protected:
+        /**
+         * Declaration of architectural page table for x86.
+         *
+         * These page tables are stored in system memory and respect x86
+         * specification.
+         */
+        typedef MultiLevelPageTable<PageTableOps> ArchPageTable;
+
         Addr _gdtStart;
         Addr _gdtSize;
 
@@ -189,14 +197,6 @@ namespace X86ISA
                    Process *process, TheISA::IntReg flags) override;
     };
 
-    /**
-     * Declaration of architectural page table for x86.
-     *
-     * These page tables are stored in system memory and respect x86
-     * specification.
-     */
-    typedef MultiLevelPageTable<PageTableOps> ArchPageTable;
-
 }
 
 #endif // __ARCH_X86_PROCESS_HH__
index 0d0a75ef58894ef1d2674b9ab6278a2b667bc5ab..883b47cdcd0869969df0fbef21af1b0ae657487d 100644 (file)
@@ -246,19 +246,4 @@ class FuncPageTable : public PageTableBase
     void getMappings(std::vector<std::pair<Addr, Addr>> *addr_maps) override;
 };
 
-/**
- * Faux page table class indended to stop the usage of
- * an architectural page table, when there is none defined
- * for a particular ISA.
- */
-class NoArchPageTable : public FuncPageTable
-{
-  public:
-    NoArchPageTable(const std::string &__name, uint64_t _pid, System *_sys,
-              Addr _pageSize = TheISA::PageBytes) : FuncPageTable(__name, _pid)
-    {
-        fatal("No architectural page table defined for this ISA.\n");
-    }
-};
-
 #endif // __MEM_PAGE_TABLE_HH__
index ee90667ffe46a407e55c96dd65a130ccf1af1bce..77d7903a7e370e8628f2a38dc87c5bca603f02a8 100644 (file)
 using namespace std;
 using namespace TheISA;
 
-Process::Process(ProcessParams * params, ObjectFile * obj_file)
+Process::Process(ProcessParams *params, PageTableBase *pTable,
+                 ObjectFile *obj_file)
     : SimObject(params), system(params->system),
       useArchPT(params->useArchPT),
       kvmInSE(params->kvmInSE),
-      pTable(useArchPT ?
-        static_cast<PageTableBase *>(new ArchPageTable(name(), params->pid,
-            system)) :
-        static_cast<PageTableBase *>(new FuncPageTable(name(), params->pid))),
+      pTable(pTable),
       initVirtMem(system->getSystemPort(), this,
                   SETranslatingPortProxy::Always),
       objFile(obj_file),
index e4a52e3de48ba1a7c7073a62f3468fe3c67242c1..6d465aca90959e20c30ae080ef2c4118c2d3e89f 100644 (file)
@@ -63,7 +63,8 @@ class ThreadContext;
 class Process : public SimObject
 {
   public:
-    Process(ProcessParams *params, ObjectFile *obj_file);
+    Process(ProcessParams *params, PageTableBase *pTable,
+            ObjectFile *obj_file);
 
     void serialize(CheckpointOut &cp) const override;
     void unserialize(CheckpointIn &cp) override;