#include "cpu/thread_context.hh"
#include "debug/Loader.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/byteswap.hh"
#include "sim/process_impl.hh"
using namespace std;
AlphaProcess::AlphaProcess(ProcessParams *params, ObjectFile *objFile)
- : Process(params, objFile)
+ : Process(params, new FuncPageTable(params->name, params->pid), objFile)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
Addr brk_point = objFile->dataBase() + objFile->dataSize() +
objFile->bssSize();
brk_point = roundUp(brk_point, PageBytes);
virtual bool mmapGrowsDown() const override { return false; }
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
#endif // __ARCH_ALPHA_PROCESS_HH__
#include "cpu/thread_context.hh"
#include "debug/Stack.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/byteswap.hh"
#include "sim/process_impl.hh"
ArmProcess::ArmProcess(ProcessParams *params, ObjectFile *objFile,
ObjectFile::Arch _arch)
- : Process(params, objFile), arch(_arch)
+ : Process(params, new FuncPageTable(params->name, params->pid), objFile),
+ arch(_arch)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
}
ArmProcess32::ArmProcess32(ProcessParams *params, ObjectFile *objFile,
void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
#endif // __ARM_PROCESS_HH__
#include "cpu/thread_context.hh"
#include "debug/Loader.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/process.hh"
#include "sim/process_impl.hh"
using namespace std;
using namespace MipsISA;
-MipsProcess::MipsProcess(ProcessParams * params, ObjectFile *objFile)
- : Process(params, objFile)
+MipsProcess::MipsProcess(ProcessParams *params, ObjectFile *objFile)
+ : Process(params, new FuncPageTable(params->name, params->pid), objFile)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
// Set up stack. On MIPS, stack starts at the top of kuseg
// user address space. MIPS stack grows down from here
Addr stack_base = 0x7FFFFFFF;
void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
-
#endif // __MIPS_PROCESS_HH__
#include "cpu/thread_context.hh"
#include "debug/Stack.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/process_impl.hh"
#include "sim/syscall_return.hh"
using namespace PowerISA;
PowerProcess::PowerProcess(ProcessParams *params, ObjectFile *objFile)
- : Process(params, objFile)
+ : Process(params, new FuncPageTable(params->name, params->pid), objFile)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
// Set up break point (Top of Heap)
Addr brk_point = objFile->dataBase() + objFile->dataSize() +
objFile->bssSize();
void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
#endif // __POWER_PROCESS_HH__
using namespace std;
using namespace RiscvISA;
-RiscvProcess::RiscvProcess(ProcessParams * params,
- ObjectFile *objFile) : Process(params, objFile)
+RiscvProcess::RiscvProcess(ProcessParams *params, ObjectFile *objFile) :
+ Process(params, new FuncPageTable(params->name, params->pid), objFile)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
const Addr stack_base = 0x7FFFFFFFFFFFFFFFL;
const Addr max_stack_size = 8 * 1024 * 1024;
const Addr next_thread_stack_base = stack_base - max_stack_size;
virtual bool mmapGrowsDown() const override { return false; }
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
-
#endif // __RISCV_PROCESS_HH__
#include "cpu/thread_context.hh"
#include "debug/Stack.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/process_impl.hh"
#include "sim/syscall_return.hh"
static const int FirstArgumentReg = 8;
-SparcProcess::SparcProcess(ProcessParams * params, ObjectFile *objFile,
+SparcProcess::SparcProcess(ProcessParams *params, ObjectFile *objFile,
Addr _StackBias)
- : Process(params, objFile), StackBias(_StackBias)
+ : Process(params, new FuncPageTable(params->name, params->pid), objFile),
+ StackBias(_StackBias)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
// Initialize these to 0s
fillStart = 0;
spillStart = 0;
void setSyscallArg(ThreadContext *tc, int i, SparcISA::IntReg val);
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
#endif // __SPARC_PROCESS_HH__
#include "debug/Stack.hh"
#include "mem/multi_level_page_table.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/process_impl.hh"
#include "sim/syscall_desc.hh"
static const int NumArgumentRegs32 M5_VAR_USED =
sizeof(ArgumentReg) / sizeof(const int);
-X86Process::X86Process(ProcessParams * params, ObjectFile *objFile,
+X86Process::X86Process(ProcessParams *params, ObjectFile *objFile,
SyscallDesc *_syscallDescs, int _numSyscallDescs)
- : Process(params, objFile), syscallDescs(_syscallDescs),
- numSyscallDescs(_numSyscallDescs)
+ : Process(params, params->useArchPT ?
+ static_cast<PageTableBase *>(
+ new ArchPageTable(params->name, params->pid,
+ params->system)) :
+ static_cast<PageTableBase *>(
+ new FuncPageTable(params->name, params->pid)),
+ objFile),
+ syscallDescs(_syscallDescs), numSyscallDescs(_numSyscallDescs)
{
}
class X86Process : public Process
{
protected:
+ /**
+ * Declaration of architectural page table for x86.
+ *
+ * These page tables are stored in system memory and respect x86
+ * specification.
+ */
+ typedef MultiLevelPageTable<PageTableOps> ArchPageTable;
+
Addr _gdtStart;
Addr _gdtSize;
Process *process, TheISA::IntReg flags) override;
};
- /**
- * Declaration of architectural page table for x86.
- *
- * These page tables are stored in system memory and respect x86
- * specification.
- */
- typedef MultiLevelPageTable<PageTableOps> ArchPageTable;
-
}
#endif // __ARCH_X86_PROCESS_HH__
void getMappings(std::vector<std::pair<Addr, Addr>> *addr_maps) override;
};
-/**
- * Faux page table class indended to stop the usage of
- * an architectural page table, when there is none defined
- * for a particular ISA.
- */
-class NoArchPageTable : public FuncPageTable
-{
- public:
- NoArchPageTable(const std::string &__name, uint64_t _pid, System *_sys,
- Addr _pageSize = TheISA::PageBytes) : FuncPageTable(__name, _pid)
- {
- fatal("No architectural page table defined for this ISA.\n");
- }
-};
-
#endif // __MEM_PAGE_TABLE_HH__
using namespace std;
using namespace TheISA;
-Process::Process(ProcessParams * params, ObjectFile * obj_file)
+Process::Process(ProcessParams *params, PageTableBase *pTable,
+ ObjectFile *obj_file)
: SimObject(params), system(params->system),
useArchPT(params->useArchPT),
kvmInSE(params->kvmInSE),
- pTable(useArchPT ?
- static_cast<PageTableBase *>(new ArchPageTable(name(), params->pid,
- system)) :
- static_cast<PageTableBase *>(new FuncPageTable(name(), params->pid))),
+ pTable(pTable),
initVirtMem(system->getSystemPort(), this,
SETranslatingPortProxy::Always),
objFile(obj_file),
class Process : public SimObject
{
public:
- Process(ProcessParams *params, ObjectFile *obj_file);
+ Process(ProcessParams *params, PageTableBase *pTable,
+ ObjectFile *obj_file);
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;