r600: Add support for loading index register from other than chan X
authorGert Wollny <gert.wollny@collabora.com>
Wed, 6 May 2020 21:20:49 +0000 (23:20 +0200)
committerMarge Bot <eric+marge@anholt.net>
Tue, 19 May 2020 07:52:13 +0000 (07:52 +0000)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>

src/gallium/drivers/r600/eg_asm.c
src/gallium/drivers/r600/r600_asm.h

index acf3fd374165865494963ae5a2c4d711f2003473..9468e4b014f816374d6de572b30156da059cbcc2 100644 (file)
@@ -189,7 +189,7 @@ int egcm_load_index_reg(struct r600_bytecode *bc, unsigned id, bool inside_alu_c
        memset(&alu, 0, sizeof(alu));
        alu.op = ALU_OP1_MOVA_INT;
        alu.src[0].sel = bc->index_reg[id];
-       alu.src[0].chan = 0;
+       alu.src[0].chan = bc->index_reg_chan[id];
        if (bc->chip_class == CAYMAN)
                alu.dst.sel = id == 0 ? CM_V_SQ_MOVA_DST_CF_IDX0 : CM_V_SQ_MOVA_DST_CF_IDX1;
 
index f132b720421e4228e4e73d40fcf67c46c8fe1b30..390b15422f67b98376e547219cc0647f943367dc 100644 (file)
@@ -278,6 +278,7 @@ struct r600_bytecode {
        unsigned        r6xx_nop_after_rel_dst;
        bool            index_loaded[2];
        unsigned        index_reg[2]; /* indexing register CF_INDEX_[01] */
+       unsigned        index_reg_chan[2]; /* indexing register chanel CF_INDEX_[01] */
        unsigned        debug_id;
        struct r600_isa* isa;
        struct r600_bytecode_output pending_outputs[5];