radeon/r200/r300: drop radeon renderbuffer private width/height
authorDave Airlie <airlied@redhat.com>
Thu, 2 Jul 2009 10:57:45 +0000 (20:57 +1000)
committerDave Airlie <airlied@redhat.com>
Thu, 2 Jul 2009 10:57:45 +0000 (20:57 +1000)
half stealing the code without taking the intel regions

src/mesa/drivers/dri/r200/r200_texstate.c
src/mesa/drivers/dri/r300/r300_texstate.c
src/mesa/drivers/dri/radeon/radeon_common_context.c
src/mesa/drivers/dri/radeon/radeon_common_context.h
src/mesa/drivers/dri/radeon/radeon_texstate.c

index ed1995e147c3a099f5b76158086c68fe75f28cd1..4e53672aee29bc4615b9d786f5d84b068fb810f2 100644 (file)
@@ -834,7 +834,7 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo
                rImage->mt = NULL;
        }
        _mesa_init_teximage_fields(radeon->glCtx, target, texImage,
-                                  rb->width, rb->height, 1, 0, rb->cpp);
+                                  rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
        texImage->RowStride = rb->pitch / rb->cpp;
        texImage->TexFormat = radeonChooseTextureFormat(radeon->glCtx,
                                                        internalFormat,
@@ -866,8 +866,8 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo
                t->pp_txfilter |= tx_table_le[MESA_FORMAT_RGB565].filter;
                break;
        }
-        t->pp_txsize = ((rb->width - 1) << RADEON_TEX_USIZE_SHIFT)
-                  | ((rb->height - 1) << RADEON_TEX_VSIZE_SHIFT);
+        t->pp_txsize = ((rb->base.Width - 1) << RADEON_TEX_USIZE_SHIFT)
+                  | ((rb->base.Height - 1) << RADEON_TEX_VSIZE_SHIFT);
         t->pp_txformat |= R200_TXFORMAT_NON_POWER2;
        t->pp_txpitch = pitch_val;
         t->pp_txpitch -= 32;
index 6e47321246ab50452aaae8c80c5c11c08ec1e170..c380840a00157fa05eec36092e70ba4fe190cca9 100644 (file)
@@ -437,7 +437,7 @@ void r300SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo
                rImage->mt = NULL;
        }
        _mesa_init_teximage_fields(radeon->glCtx, target, texImage,
-                                  rb->width, rb->height, 1, 0, rb->cpp);
+                                  rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
        texImage->RowStride = rb->pitch / rb->cpp;
        texImage->TexFormat = radeonChooseTextureFormat(radeon->glCtx,
                                                        internalFormat,
@@ -473,15 +473,15 @@ void r300SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo
                break;
        }
        pitch_val--;
-       t->pp_txsize = ((rb->width - 1) << R300_TX_WIDTHMASK_SHIFT) |
-              ((rb->height - 1) << R300_TX_HEIGHTMASK_SHIFT);
+       t->pp_txsize = ((rb->base.Width - 1) << R300_TX_WIDTHMASK_SHIFT) |
+              ((rb->base.Height - 1) << R300_TX_HEIGHTMASK_SHIFT);
        t->pp_txsize |= R300_TX_SIZE_TXPITCH_EN;
        t->pp_txpitch |= pitch_val;
 
        if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
-           if (rb->width > 2048)
+           if (rb->base.Width > 2048)
                t->pp_txpitch |= R500_TXWIDTH_BIT11;
-           if (rb->height > 2048)
+           if (rb->base.Height > 2048)
                t->pp_txpitch |= R500_TXHEIGHT_BIT11;
        }
        t->validated = GL_TRUE;
index 009859fecaa0e2f40685f321cb289b817f0a08e0..94bda78ce3a219254fabea25421bad2befb8feb0 100644 (file)
@@ -605,8 +605,8 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 
                rb->cpp = buffers[i].cpp;
                rb->pitch = buffers[i].pitch;
-               rb->width = drawable->w;
-               rb->height = drawable->h;
+               rb->base.Width = drawable->w;
+               rb->base.Height = drawable->h;
                rb->has_surface = 0;
 
                if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_bo) {
index 061168fe96b0300fb7538aa2472525d8106f925d..b607fad87b9b435390b47ce3b47fd1fd4f820825 100644 (file)
@@ -83,8 +83,6 @@ struct radeon_renderbuffer
        unsigned int cpp;
        /* unsigned int offset; */
        unsigned int pitch;
-       unsigned int width;
-       unsigned int height;
 
        uint32_t draw_offset; /* FBO */
        /* boo Xorg 6.8.2 compat */
index 279bcd4df6a3afc019ec59f624e0fb175681d6e0..d33eb9988f1f1abec1c6be025384b9bd07517ad8 100644 (file)
@@ -706,7 +706,7 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_
                rImage->mt = NULL;
        }
        _mesa_init_teximage_fields(radeon->glCtx, target, texImage,
-                                  rb->width, rb->height, 1, 0, rb->cpp);
+                                  rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
        texImage->RowStride = rb->pitch / rb->cpp;
        texImage->TexFormat = radeonChooseTextureFormat(radeon->glCtx,
                                                        internalFormat,
@@ -738,8 +738,8 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_
                t->pp_txfilter |= tx_table[MESA_FORMAT_RGB565].filter;
                break;
        }
-        t->pp_txsize = ((rb->width - 1) << RADEON_TEX_USIZE_SHIFT)
-                  | ((rb->height - 1) << RADEON_TEX_VSIZE_SHIFT);
+        t->pp_txsize = ((rb->base.Width - 1) << RADEON_TEX_USIZE_SHIFT)
+                  | ((rb->base.Height - 1) << RADEON_TEX_VSIZE_SHIFT);
         t->pp_txformat |= RADEON_TXFORMAT_NON_POWER2;
        t->pp_txpitch = pitch_val;
         t->pp_txpitch -= 32;