mention trap on illegal instruction

diff --git a/openpower/isans_letter.mdwn b/openpower/isans_letter.mdwn
index f07fbfc036a882b7c8edb5141b9c884ae6d09bd2..943f8be5161526e7cf9d83d85f23d322b4f6b9e1 100644 (file)
--- a/openpower/isans_letter.mdwn
+++ b/openpower/isans_letter.mdwn
@@ -33,7 +33,7 @@ with people who can help us.
   Broadcom VideoCore IV being based around extensions to an ARC core).
 * Libre-SOC's extensions will be easily adopted, as the standard GNU/Linux
   distributions will very deliberately run unmodified on our ISA,
-  including full compatibility with illegal instruction requirements.
+  including full compatibility with illegal instruction trap requirements.
 
 ## One CPU multiple ISAs