freedreno: add ubwc_enabled helper

Since it is dependent on the tile mode (ie. disabled for smaller mipmap
levels), we should handle it a similar way to fd_resource_level_linear().
The code previously mostly did the right thing because the old helper
took the tile mode.

Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
index a830b646d7eb7aac790478134a6ae031640ad2bf..ced13ad1a078423c816b25fcfa1725cbcc943192 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
@@ -442,6 +442,8 @@ emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
                unsigned doff = fd_resource_offset(dst, info->dst.level, dbox->z + i);
                unsigned subwcoff = fd_resource_ubwc_offset(src, info->src.level, sbox->z + i);
                unsigned dubwcoff = fd_resource_ubwc_offset(dst, info->dst.level, dbox->z + i);
+               bool subwc_enabled = fd_resource_ubwc_enabled(src, info->src.level);
+               bool dubwc_enabled = fd_resource_ubwc_enabled(dst, info->dst.level);
 
                /*
                 * Emit source:
@@ -457,7 +459,7 @@ emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
                                A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(stile) |
                                A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(sswap) |
                                 A6XX_SP_PS_2D_SRC_INFO_SAMPLES(samples) |
-                                COND(fd6_ubwc_enabled(src, stile), A6XX_SP_PS_2D_SRC_INFO_FLAGS) |
+                                COND(subwc_enabled, A6XX_SP_PS_2D_SRC_INFO_FLAGS) |
                                 0x500000 | filter);
                OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(width) |
                                 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(height)); /* SP_PS_2D_SRC_SIZE */
@@ -470,7 +472,7 @@ emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
                OUT_RING(ring, 0x00000000);
                OUT_RING(ring, 0x00000000);
 
-               if (fd6_ubwc_enabled(src, stile)) {
+               if (subwc_enabled) {
                        OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_FLAGS_LO, 6);
                        OUT_RELOC(ring, src->bo, subwcoff, 0, 0);
                        OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(src->ubwc_pitch) |
@@ -487,7 +489,7 @@ emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
                OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(dfmt) |
                                 A6XX_RB_2D_DST_INFO_TILE_MODE(dtile) |
                                 A6XX_RB_2D_DST_INFO_COLOR_SWAP(dswap) |
-                                COND(fd6_ubwc_enabled(dst, dtile), A6XX_RB_2D_DST_INFO_FLAGS));
+                                COND(dubwc_enabled, A6XX_RB_2D_DST_INFO_FLAGS));
                OUT_RELOCW(ring, dst->bo, doff, 0, 0);    /* RB_2D_DST_LO/HI */
                OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(dpitch));
                OUT_RING(ring, 0x00000000);
@@ -496,7 +498,7 @@ emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
                OUT_RING(ring, 0x00000000);
                OUT_RING(ring, 0x00000000);
 
-               if (fd6_ubwc_enabled(dst, dtile)) {
+               if (dubwc_enabled) {
                        OUT_PKT4(ring, REG_A6XX_RB_2D_DST_FLAGS_LO, 6);
                        OUT_RELOCW(ring, dst->bo, dubwcoff, 0, 0);
                        OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(dst->ubwc_pitch) |

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_format.h b/src/gallium/drivers/freedreno/a6xx/fd6_format.h
index 2c4f58655276bdcb38c807fb156967c2b7528941..388de5b48c07c8e00e88fa09d820d0ad0653bb45 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_format.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_format.h
@@ -119,10 +119,4 @@ fd6_ifmt(enum a6xx_color_fmt fmt)
        }
 }
 
-static inline bool
-fd6_ubwc_enabled(struct fd_resource *rsc, enum a6xx_tile_mode tile_mode)
-{
-       return rsc->ubwc_size && tile_mode == TILE6_3;
-}
-
 #endif /* FD6_UTIL_H_ */

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index 9b768a38c5e5b02c954274b07cf0d2aaaaffdfd5..e9b12812f46565cb977202f0790a74af9c928b12 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -65,6 +65,7 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb,
                uint32_t stride = 0;
                uint32_t offset, ubwc_offset;
                uint32_t tile_mode;
+               bool ubwc_enabled;
 
                if (!pfb->cbufs[i])
                        continue;
@@ -87,9 +88,10 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb,
                        srgb_cntl |= (1 << i);
 
                offset = fd_resource_offset(rsc, psurf->u.tex.level,
-                                                                       psurf->u.tex.first_layer);
+                               psurf->u.tex.first_layer);
                ubwc_offset = fd_resource_ubwc_offset(rsc, psurf->u.tex.level,
-                                                                       psurf->u.tex.first_layer);
+                               psurf->u.tex.first_layer);
+               ubwc_enabled = fd_resource_ubwc_enabled(rsc, psurf->u.tex.level);
 
                stride = slice->pitch * rsc->cpp * pfb->samples;
                swap = rsc->tile_mode ? WZYX : fd6_pipe2swap(pformat);
@@ -123,7 +125,7 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb,
                                COND(uint, A6XX_SP_FS_MRT_REG_COLOR_UINT));
 
                OUT_PKT4(ring, REG_A6XX_RB_MRT_FLAG_BUFFER(i), 3);
-               if (fd6_ubwc_enabled(rsc, tile_mode)) {
+               if (ubwc_enabled) {
                        OUT_RELOCW(ring, rsc->bo, ubwc_offset, 0, 0);   /* BASE_LO/HI */
                        OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(rsc->ubwc_pitch) |
                                A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(rsc->ubwc_size));
@@ -178,8 +180,7 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf,
                uint32_t ubwc_offset = fd_resource_ubwc_offset(rsc, zsbuf->u.tex.level,
                                zsbuf->u.tex.first_layer);
 
-               bool ubwc_enabled =
-                       !fd_resource_level_linear(zsbuf->texture, zsbuf->u.tex.level) && rsc->ubwc_size;
+               bool ubwc_enabled = fd_resource_ubwc_enabled(rsc, zsbuf->u.tex.level);
 
                OUT_PKT4(ring, REG_A6XX_RB_DEPTH_BUFFER_INFO, 6);
                OUT_RING(ring, A6XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(fmt));
@@ -304,8 +305,7 @@ update_render_cntl(struct fd_batch *batch, struct pipe_framebuffer_state *pfb, b
 
        if (pfb->zsbuf) {
                struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
-               depth_ubwc_enable =
-                       !fd_resource_level_linear(pfb->zsbuf->texture, pfb->zsbuf->u.tex.level) && rsc->ubwc_size;
+               depth_ubwc_enable = fd_resource_ubwc_enabled(rsc, pfb->zsbuf->u.tex.level);
        }
 
        for (i = 0; i < pfb->nr_cbufs; i++) {
@@ -317,7 +317,7 @@ update_render_cntl(struct fd_batch *batch, struct pipe_framebuffer_state *pfb, b
                if (!rsc->bo)
                        continue;
 
-               if (fd6_ubwc_enabled(rsc, rsc->tile_mode))
+               if (fd_resource_ubwc_enabled(rsc, psurf->u.tex.level))
                        mrts_ubwc_enable |= 1 << i;
        }
 
@@ -666,6 +666,7 @@ emit_blit(struct fd_batch *batch,
        struct fd_resource *rsc = fd_resource(psurf->texture);
        enum pipe_format pfmt = psurf->format;
        uint32_t offset, ubwc_offset;
+       bool ubwc_enabled;
 
        /* separate stencil case: */
        if (stencil) {
@@ -676,6 +677,7 @@ emit_blit(struct fd_batch *batch,
        slice = fd_resource_slice(rsc, psurf->u.tex.level);
        offset = fd_resource_offset(rsc, psurf->u.tex.level,
                        psurf->u.tex.first_layer);
+       ubwc_enabled = fd_resource_ubwc_enabled(rsc, psurf->u.tex.level);
        ubwc_offset = fd_resource_ubwc_offset(rsc, psurf->u.tex.level,
                        psurf->u.tex.first_layer);
 
@@ -701,7 +703,7 @@ emit_blit(struct fd_batch *batch,
                         A6XX_RB_BLIT_DST_INFO_SAMPLES(samples) |
                         A6XX_RB_BLIT_DST_INFO_COLOR_FORMAT(format) |
                         A6XX_RB_BLIT_DST_INFO_COLOR_SWAP(swap) |
-                        COND(fd6_ubwc_enabled(rsc, tile_mode), A6XX_RB_BLIT_DST_INFO_FLAGS));
+                        COND(ubwc_enabled, A6XX_RB_BLIT_DST_INFO_FLAGS));
        OUT_RELOCW(ring, rsc->bo, offset, 0, 0);  /* RB_BLIT_DST_LO/HI */
        OUT_RING(ring, A6XX_RB_BLIT_DST_PITCH(stride));
        OUT_RING(ring, A6XX_RB_BLIT_DST_ARRAY_PITCH(size));
@@ -709,7 +711,7 @@ emit_blit(struct fd_batch *batch,
        OUT_PKT4(ring, REG_A6XX_RB_BLIT_BASE_GMEM, 1);
        OUT_RING(ring, base);
 
-       if (fd6_ubwc_enabled(rsc, tile_mode)) {
+       if (ubwc_enabled) {
                OUT_PKT4(ring, REG_A6XX_RB_BLIT_FLAG_DST_LO, 3);
                OUT_RELOCW(ring, rsc->bo, ubwc_offset, 0, 0);
                OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(rsc->ubwc_pitch) |

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_image.c b/src/gallium/drivers/freedreno/a6xx/fd6_image.c
index 5eb43202dcd7bd87e4bb2e33d770efaef414013f..51ea438b672a3413387bcf76e14fc47a2dbbf128 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_image.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_image.c
@@ -168,8 +168,7 @@ static void translate_buf(struct fd6_image *img, const struct pipe_shader_buffer
 static void emit_image_tex(struct fd_ringbuffer *ring, struct fd6_image *img)
 {
        struct fd_resource *rsc = fd_resource(img->prsc);
-       bool ubwc_enabled = rsc->ubwc_size &&
-                       !fd_resource_level_linear(img->prsc, img->level);
+       bool ubwc_enabled = fd_resource_ubwc_enabled(rsc, img->level);
 
        OUT_RING(ring, fd6_tex_const_0(img->prsc, img->level, img->pfmt,
                        PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y,
@@ -230,8 +229,7 @@ static void emit_image_ssbo(struct fd_ringbuffer *ring, struct fd6_image *img)
 {
        struct fd_resource *rsc = fd_resource(img->prsc);
        enum a6xx_tile_mode tile_mode = TILE6_LINEAR;
-       bool ubwc_enabled = rsc->ubwc_size &&
-                       !fd_resource_level_linear(img->prsc, img->level);
+       bool ubwc_enabled = fd_resource_ubwc_enabled(rsc, img->level);
 
        if (rsc->tile_mode && !fd_resource_level_linear(img->prsc, img->level)) {
                tile_mode = rsc->tile_mode;

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_texture.c b/src/gallium/drivers/freedreno/a6xx/fd6_texture.c
index 8e6df8caac94c3bac8975012ccad46020ba49d04..9c42a6b8151fd17b44b1a2886ba5ab5e94967b70 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_texture.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_texture.c
@@ -266,8 +266,7 @@ fd6_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
                                                        format, rsc->slices[lvl].pitch) * rsc->cpp);
                so->offset = fd_resource_offset(rsc, lvl, cso->u.tex.first_layer);
                so->ubwc_offset = fd_resource_ubwc_offset(rsc, lvl, cso->u.tex.first_layer);
-
-               so->ubwc_enabled = rsc->ubwc_size && !fd_resource_level_linear(prsc, lvl);
+               so->ubwc_enabled = fd_resource_ubwc_enabled(rsc, lvl);
        }
 
        so->texconst0 |= fd6_tex_const_0(prsc, lvl, cso->format,

diff --git a/src/gallium/drivers/freedreno/freedreno_resource.h b/src/gallium/drivers/freedreno/freedreno_resource.h
index 2432a6b9c2a2da66b62e8547903f1157e6c9edf4..5369fcb0a35bdbe7a1ab5b427e0a1c9dc0bdbfbe 100644 (file)
--- a/src/gallium/drivers/freedreno/freedreno_resource.h
+++ b/src/gallium/drivers/freedreno/freedreno_resource.h
@@ -196,6 +196,13 @@ fd_resource_level_linear(struct pipe_resource *prsc, int level)
        return false;
 }
 
+static inline bool
+fd_resource_ubwc_enabled(struct fd_resource *rsc, int level)
+{
+       return rsc->ubwc_size && rsc->tile_mode &&
+                       !fd_resource_level_linear(&rsc->base, level);
+}
+
 /* access # of samples, with 0 normalized to 1 (which is what we care about
  * most of the time)
  */