[ARM] Rename FPSCR builtins to correct names
authorPrakhar Bahuguna <prakhar.bahuguna@arm.com>
Thu, 4 May 2017 10:16:04 +0000 (10:16 +0000)
committerThomas Preud'homme <thopre01@gcc.gnu.org>
Thu, 4 May 2017 10:16:04 +0000 (10:16 +0000)
The GCC documentation in section 6.60.8 ARM Floating Point Status and
Control Intrinsics states that the FPSCR register can be read and
written to using the intrinsics __builtin_arm_get_fpscr and
__builtin_arm_set_fpscr. However, these are misnamed within GCC itself
and these intrinsic names are not recognised.

This patch corrects the intrinsic names to match the documentation, and
adds tests to verify these intrinsics generate the correct
instructions.

2017-05-04  Prakhar Bahuguna  <prakhar.bahuguna@arm.com>

    gcc/
    * gcc/config/arm/arm-builtins.c (arm_init_builtins): Rename
    __builtin_arm_ldfscr to __builtin_arm_get_fpscr, and rename
    __builtin_arm_stfscr to __builtin_arm_set_fpscr.

    gcc/testsuite/
    * gcc.target/arm/fpscr.c: New file.

From-SVN: r247584

gcc/ChangeLog
gcc/config/arm/arm-builtins.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/arm/fpscr.c [new file with mode: 0644]

index 225799fbf836318b6c36b96cd1e777a7ec1f77e3..c98e5affee5c85a69624a325a144d9aebdc96e34 100644 (file)
@@ -1,3 +1,9 @@
+2017-05-04  Prakhar Bahuguna  <prakhar.bahuguna@arm.com>
+
+       * gcc/config/arm/arm-builtins.c (arm_init_builtins): Rename
+       __builtin_arm_ldfscr to __builtin_arm_get_fpscr, and rename
+       __builtin_arm_stfscr to __builtin_arm_set_fpscr.
+
 2017-05-04  Martin Liska  <mliska@suse.cz>
 
        * tree-vrp.c (simplify_cond_using_ranges_2): Remove unused
index 689219c1923bc0f720f70870bfde8b60f7514167..deebb59f6a6fcdae3378f4e3fb021e008a4354b0 100644 (file)
@@ -1893,10 +1893,10 @@ arm_init_builtins (void)
        = build_function_type_list (unsigned_type_node, NULL);
 
       arm_builtin_decls[ARM_BUILTIN_GET_FPSCR]
-       = add_builtin_function ("__builtin_arm_ldfscr", ftype_get_fpscr,
+       = add_builtin_function ("__builtin_arm_get_fpscr", ftype_get_fpscr,
                                ARM_BUILTIN_GET_FPSCR, BUILT_IN_MD, NULL, NULL_TREE);
       arm_builtin_decls[ARM_BUILTIN_SET_FPSCR]
-       = add_builtin_function ("__builtin_arm_stfscr", ftype_set_fpscr,
+       = add_builtin_function ("__builtin_arm_set_fpscr", ftype_set_fpscr,
                                ARM_BUILTIN_SET_FPSCR, BUILT_IN_MD, NULL, NULL_TREE);
     }
 
index b2e28ee48d3680ff41bd83a99312de1948ff17e8..bdf64ce0d14b6f1ebc2ee8cd9c9f2b1c9c63208c 100644 (file)
@@ -1,3 +1,7 @@
+2017-05-04  Prakhar Bahuguna  <prakhar.bahuguna@arm.com>
+
+       * gcc.target/arm/fpscr.c: New file.
+
 2017-05-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
        * gcc.c-torture/execute/pr78622.c: Require c99_runtime effective
diff --git a/gcc/testsuite/gcc.target/arm/fpscr.c b/gcc/testsuite/gcc.target/arm/fpscr.c
new file mode 100644 (file)
index 0000000..7b4d71d
--- /dev/null
@@ -0,0 +1,16 @@
+/* Test the fpscr builtins.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_fp_ok } */
+/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
+/* { dg-add-options arm_fp } */
+
+void
+test_fpscr ()
+{
+  volatile unsigned int status = __builtin_arm_get_fpscr ();
+  __builtin_arm_set_fpscr (status);
+}
+
+/* { dg-final { scan-assembler "mrc\tp10, 7, r\[0-9\]+, cr1, cr0, 0" } } */
+/* { dg-final { scan-assembler "mcr\tp10, 7, r\[0-9\]+, cr1, cr0, 0" } } */