Here is a table of the instruction names that are meaningful in the RTL
generation pass of the compiler. Giving one of these names to an
instruction pattern tells the RTL generation pass that it can use the
-pattern in to accomplish a certain task.
+pattern to accomplish a certain task.
@table @asis
@cindex @code{mov@var{m}} instruction pattern
between these two locations). On those machines, define
@code{FRAME_POINTER_REGNUM} the number of a special, fixed register to
be used internally until the offset is known, and define
-@code{HARD_FRAME_POINTER_REGNUM} to be actual the hard register number
+@code{HARD_FRAME_POINTER_REGNUM} to be the actual hard register number
used for the frame pointer.
You should define this macro only in the very rare circumstances when it
Define the macros @code{REGISTER_PREFIX}, @code{LOCAL_LABEL_PREFIX},
@code{USER_LABEL_PREFIX} and @code{IMMEDIATE_PREFIX} if you can express
-the variations in assemble language syntax with that mechanism. Define
+the variations in assembly language syntax with that mechanism. Define
@code{ASSEMBLER_DIALECT} and use the @samp{@{option0|option1@}} syntax
if the syntax variant are larger and involve such things as different
opcodes or operand order.
@findex ASM_NO_SKIP_IN_TEXT
@item ASM_NO_SKIP_IN_TEXT
Define this macro if @code{ASM_OUTPUT_SKIP} should not be used in the
-text section because it fails put zeros in the bytes that are skipped.
+text section because it fails to put zeros in the bytes that are skipped.
This is true on many Unix systems, where the pseudo--op to skip bytes
produces no-op instructions rather than zeros when used in the text
section.
predicate can cause the compiler to malfunction). Instead, it allows
the table built by @file{genrecog} to be more compact and efficient,
thus speeding up the compiler. The most important predicates to include
-in the list specified by this macro are thoses used in the most insn
+in the list specified by this macro are those used in the most insn
patterns.
@findex CASE_VECTOR_MODE