entered into RCS
authorJim Wilson <wilson@gcc.gnu.org>
Wed, 27 May 1992 21:57:09 +0000 (14:57 -0700)
committerJim Wilson <wilson@gcc.gnu.org>
Wed, 27 May 1992 21:57:09 +0000 (14:57 -0700)
From-SVN: r1105

gcc/config/i960/i960.h
gcc/config/i960/i960.md

index 4d1bb424d456f82bf0ed3f0c9b3c8b9c14213d8d..86b0250761a0dd839bbd46688fdc819a8157d64d 100644 (file)
@@ -292,6 +292,12 @@ extern int target_flags;
       flag_signed_char = 1;                                    \
       target_flags |= TARGET_FLAG_CLEAN_LINKAGE;               \
     }                                                          \
+  /* ??? Function inlining is not supported, because the i960  \
+     calling convention requires the caller to manage the arg  \
+     pointer in a wierd fashion.  This is ordinarily done by   \
+     expand_call, but this is never called when inlining       \
+     functions, and no replacement for it exists.  */          \
+  flag_no_inline = 1;                                          \
   i960_initialize ();                                          \
 }
 
index d5873342141d941fecf45c53f568d3077ec9aa92..1adf36a4d5d742a8e9e89297d9a41ffff017e472 100644 (file)
 (define_insn ""
   [(set (match_operand:SI 0 "general_operand" "=d,d,d,m")
        (match_operand:SI 1 "general_operand" "dI,i,m,dJ"))]
-  "current_function_args_size <= 48
+  "current_function_args_size == 0
    && (register_operand (operands[0], SImode)
        || register_operand (operands[1], SImode)
        || operands[1] == const0_rtx)"
 (define_insn ""
   [(set (match_operand:SI 0 "general_operand" "=d,d,d,m")
        (match_operand:SI 1 "general_operand" "dI,i,m,d"))]
-  "current_function_args_size > 48
+  "current_function_args_size != 0
    && (register_operand (operands[0], SImode)
        || register_operand (operands[1], SImode))"
   "*
 (define_insn ""
   [(set (match_operand:HI 0 "general_operand" "=d,d,d,m")
        (match_operand:HI 1 "general_operand" "dI,i,m,dJ"))]
-  "current_function_args_size <= 48
+  "current_function_args_size == 0
    && (register_operand (operands[0], HImode)
        || register_operand (operands[1], HImode)
        || operands[1] == const0_rtx)"
 (define_insn ""
   [(set (match_operand:HI 0 "general_operand" "=d,d,d,m")
        (match_operand:HI 1 "general_operand" "dI,i,m,d"))]
-  "current_function_args_size > 48
+  "current_function_args_size != 0
    && (register_operand (operands[0], HImode)
        || register_operand (operands[1], HImode))"
   "*
 (define_insn ""
   [(set (match_operand:QI 0 "general_operand" "=d,d,d,m")
        (match_operand:QI 1 "general_operand" "dI,i,m,dJ"))]
-  "current_function_args_size <= 48
+  "current_function_args_size == 0
    && (register_operand (operands[0], QImode)
        || register_operand (operands[1], QImode)
        || operands[1] == const0_rtx)"
 (define_insn ""
   [(set (match_operand:QI 0 "general_operand" "=d,d,d,m")
        (match_operand:QI 1 "general_operand" "dI,i,m,d"))]
-  "current_function_args_size > 48
+  "current_function_args_size != 0
    && (register_operand (operands[0], QImode)
        || register_operand (operands[1], QImode))"
   "*
 (define_insn ""
   [(set (match_operand:DI 0 "general_operand" "=d,d,d,m")
        (match_operand:DI 1 "general_operand" "dI,i,m,dJ"))]
-  "current_function_args_size <= 48
+  "current_function_args_size == 0
    && (register_operand (operands[0], DImode)
        || register_operand (operands[1], DImode)
        || operands[1] == const0_rtx)"
 (define_insn ""
   [(set (match_operand:DI 0 "general_operand" "=d,d,d,m")
        (match_operand:DI 1 "general_operand" "dI,i,m,d"))]
-  "current_function_args_size > 48
+  "current_function_args_size != 0
    && (register_operand (operands[0], DImode)
        || register_operand (operands[1], DImode))"
   "*
 (define_insn ""
   [(set (match_operand:TI 0 "general_operand" "=d,d,d,m")
        (match_operand:TI 1 "general_operand" "dI,i,m,dJ"))]
-  "current_function_args_size <= 48
+  "current_function_args_size == 0
    && (register_operand (operands[0], TImode)
        || register_operand (operands[1], TImode)
        || operands[1] == const0_rtx)"
 (define_insn ""
   [(set (match_operand:TI 0 "general_operand" "=d,d,d,m")
        (match_operand:TI 1 "general_operand" "dI,i,m,d"))]
-  "current_function_args_size > 48
+  "current_function_args_size != 0
    && (register_operand (operands[0], TImode)
        || register_operand (operands[1], TImode))"
   "*
 (define_insn ""
   [(set (match_operand:DF 0 "general_operand" "=r,f,d,d,m")
        (match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,dG"))]
-  "current_function_args_size <= 48
+  "current_function_args_size == 0
    && (register_operand (operands[0], DFmode)
        || register_operand (operands[1], DFmode)
        || operands[1] == CONST0_RTX (DFmode))"
 (define_insn ""
   [(set (match_operand:DF 0 "general_operand" "=r,f,d,d,m")
        (match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
-  "current_function_args_size > 48
+  "current_function_args_size != 0
    && (register_operand (operands[0], DFmode)
        || register_operand (operands[1], DFmode))"
   "*
 (define_insn ""
   [(set (match_operand:SF 0 "general_operand" "=r,f,d,d,m")
        (match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,dG"))]
-  "current_function_args_size <= 48
+  "current_function_args_size == 0
    && (register_operand (operands[0], SFmode)
        || register_operand (operands[1], SFmode)
        || operands[1] == CONST0_RTX (SFmode))"
 (define_insn ""
   [(set (match_operand:SF 0 "general_operand" "=r,f,d,d,m")
        (match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
-  "current_function_args_size > 48
+  "current_function_args_size != 0
    && (register_operand (operands[0], SFmode)
        || register_operand (operands[1], SFmode))"
   "*
 (define_insn ""
   [(set (match_operand:TF 0 "general_operand" "=r,f,d,d,m")
        (match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,dG"))]
-  "current_function_args_size <= 48
+  "current_function_args_size == 0
    && (register_operand (operands[0], TFmode)
        || register_operand (operands[1], TFmode)
        || operands[1] == CONST0_RTX (TFmode))"
 (define_insn ""
   [(set (match_operand:TF 0 "general_operand" "=r,f,d,d,m")
        (match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
-  "current_function_args_size > 48
+  "current_function_args_size != 0
    && (register_operand (operands[0], TFmode)
        || register_operand (operands[1], TFmode))"
   "*