add english language description for lbzupx

diff --git a/openpower/isa/pifixedload.mdwn b/openpower/isa/pifixedload.mdwn
index 045d32624a294d15809d45a67655637fade50989..73b72db3065875115dec4bdfe04f31bc45c0e2f9 100644 (file)
--- a/openpower/isa/pifixedload.mdwn
+++ b/openpower/isa/pifixedload.mdwn
@@ -46,6 +46,16 @@ Pseudo-code:
     RT <- ([0] * (XLEN-8)) || MEM(EA, 1)
     RA <- (RA) + (RB)
 
+Description:
+
+    Let the effective address (EA) be register RA.
+    The byte in storage addressed by EA is loaded into
+    RT[56:63]. RT[0:55] are set to 0.
+
+    The sum (RA) + (RB) is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None