interface Ifc_rgbttl_dummy;
interface AXI4_Lite_Slave_IFC#(`ADDR, `DATA, `USERSPACE) slave;
- method Bit#(1) de;
- method Bit#(1) ck;
- method Bit#(1) vs;
- method Bit#(1) hs;
- method Bit#(`RGBTTL_WIDTH) data;
+ interface Get#(Bit#(1)) de;
+ interface Get#(Bit#(1)) ck;
+ interface Get#(Bit#(1)) vs;
+ interface Get#(Bit#(1)) hs;
+ interface Get#(Bit#(`RGBTTL_WIDTH)) data;
endinterface
(*synthesize*)
Reg#(Bit#(1)) rg_hs <- mkReg(0);
Reg#(Bit#(`RGBTTL_WIDTH)) rg_data <- mkReg(0);
- method de = rg_de;
- method ck = rg_ck;
- method vs = rg_vs;
- method hs = rg_hs;
- method data = rg_data;
- interface slave=s_xactor.axi_side;
+ interface de = interface Get
+ method ActionValue#(Bit#(1)) get;
+ return rg_de;
+ endmethod
+ endinterface;
+
+ interface ck = interface Get
+ method ActionValue#(Bit#(1)) get;
+ return rg_ck;
+ endmethod
+ endinterface;
+
+ interface vs = interface Get
+ method ActionValue#(Bit#(1)) get;
+ return rg_vs;
+ endmethod
+ endinterface;
+
+ interface hs = interface Get
+ method ActionValue#(Bit#(1)) get;
+ return rg_hs;
+ endmethod
+ endinterface;
+
+ interface data = interface Get
+ method ActionValue#(Bit#(`RGBTTL_WIDTH)) get;
+ return data;
+ endmethod
+ endinterface;
+
+ interface slave=s_xactor.axi_side;
endmodule
endpackage