i965/Gen7: Only emit cube face enables for cubes.

This is not observed to actually fix anything, but the PRM says this
field must be zero for other surface types.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 761bc3ba3e4fdfa4e0effddbf4d53f99bf1d6bce..bda09a01a89c30a7739c427265521506c7b82365 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -298,8 +298,11 @@ gen7_update_texture_surface(struct gl_context *ctx,
 
    surf[0] = translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
              tex_format << BRW_SURFACE_FORMAT_SHIFT |
-             gen7_surface_tiling_mode(mt->region->tiling) |
-             BRW_SURFACE_CUBEFACE_ENABLES;
+             gen7_surface_tiling_mode(mt->region->tiling);
+
+   /* mask of faces present in cube map; for other surfaces MBZ. */
+   if (tObj->Target == GL_TEXTURE_CUBE_MAP || tObj->Target == GL_TEXTURE_CUBE_MAP_ARRAY)
+      surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES;
 
    if (mt->align_h == 4)
       surf[0] |= GEN7_SURFACE_VALIGN_4;