radv: Set partial_vs_wave for pipelines with just GS, not tess.

Looking at -pro we need to enable it for pipelines with just a
GS too.

This seems to reduce the hangs from
https://bugs.freedesktop.org/show_bug.cgi?id=109242 on a RX 550 to
the point where I can't reproduce, after the false start with the
wd_switch_on_eop patch due to flakiness.

(but people are reporting it does not fix the issue completely for
 them on polaris 11)

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 9d5da43532f6efddc0258fb81d768d3f204277ca..d9463a1e8b84bceb0f10c777de25918e47af4d82 100644 (file)
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3428,14 +3428,6 @@ radv_compute_ia_multi_vgt_param_helpers(struct radv_pipeline *pipeline,
                        if (radv_pipeline_has_gs(pipeline)) {
                                if (device->physical_device->rad_info.chip_class <= VI)
                                        ia_multi_vgt_param.partial_es_wave = true;
-
-                               if (device->physical_device->rad_info.family == CHIP_TONGA ||
-                                   device->physical_device->rad_info.family == CHIP_FIJI ||
-                                   device->physical_device->rad_info.family == CHIP_POLARIS10 ||
-                                   device->physical_device->rad_info.family == CHIP_POLARIS11 ||
-                                   device->physical_device->rad_info.family == CHIP_POLARIS12 ||
-                                   device->physical_device->rad_info.family == CHIP_VEGAM)
-                                       ia_multi_vgt_param.partial_vs_wave = true;
                        } else {
                                ia_multi_vgt_param.partial_vs_wave = true;
                        }
@@ -3453,6 +3445,26 @@ radv_compute_ia_multi_vgt_param_helpers(struct radv_pipeline *pipeline,
                ia_multi_vgt_param.partial_vs_wave = true;
        }
 
+       if (radv_pipeline_has_gs(pipeline)) {
+               /* On these chips there is the possibility of a hang if the
+                * pipeline uses a GS and partial_vs_wave is not set.
+                *
+                * This mostly does not hit 4-SE chips, as those typically set
+                * ia_switch_on_eoi and then partial_vs_wave is set for pipelines
+                * with GS due to another workaround.
+                *
+                * Reproducer: https://bugs.freedesktop.org/show_bug.cgi?id=109242
+                */
+               if (device->physical_device->rad_info.family == CHIP_TONGA ||
+                   device->physical_device->rad_info.family == CHIP_FIJI ||
+                   device->physical_device->rad_info.family == CHIP_POLARIS10 ||
+                   device->physical_device->rad_info.family == CHIP_POLARIS11 ||
+                   device->physical_device->rad_info.family == CHIP_POLARIS12 ||
+                   device->physical_device->rad_info.family == CHIP_VEGAM) {
+                       ia_multi_vgt_param.partial_vs_wave = true;
+               }
+       }
+
        ia_multi_vgt_param.base =
                S_028AA8_PRIMGROUP_SIZE(ia_multi_vgt_param.primgroup_size - 1) |
                /* The following field was moved to VGT_SHADER_STAGES_EN in GFX9. */